Wiring Cut Strategy for Display Device Corrosion Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing manufacturing methods for display devices face issues with exposed wirings causing static electricity or electrolytic corrosion, and additional processes are required to avoid these problems, increasing the complexity and cost of production.
Innovation Solution
A manufacturing method that involves forming a semiconductor layer and a metallic layer on a substrate, using an etching resist with different thickness portions to pattern and cut the wiring while leaving the semiconductor layer unetched, and applying a passivation film to cover the wiring, thereby cutting the substrate without exposing the wiring cross-sections, thus preventing static electricity and corrosion without adding extra processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the mother substrate is cut after forming wirings, then the wiring cross-section is exposed, but this causes static electricity and electrolytic corrosion problems
Solution Approach 1:
The patent applies preliminary action by performing the wiring removal process before the substrate cutting process. Specifically, the etching resist is formed to cover the wiring, then the wiring is removed through selective etching while the etching resist remains intact. Only after the wiring is completely removed does the substrate cutting take place, ensuring no exposed wiring cross-sections are present to cause static electricity or electrolytic corrosion.
Solution Approach 2:
The patent extracts the harmful element (wiring) from the system before the cutting operation. By using selective etching to remove the wiring while leaving the etching resist in place, the dangerous wiring cross-section is extracted and eliminated before the substrate is cut, preventing any potential harmful effects from exposed conductors.
2Object-affected harmful factors
If the wiring is removed before cutting the mother substrate, then exposed wirings are avoided, but an additional removing process is required
Solution Approach 1:
The patent merges the wiring removal process with the existing manufacturing流程 by using the etching resist that is already formed for other purposes. The etching resist serves dual functions: as a protective layer during wiring removal and as a mask for subsequent etching operations. This integration eliminates the need for separate wiring removal steps while still preventing exposed wirings.
Solution Approach 2:
The etching resist is given multiple functions: it acts as a protective mask during wiring etching, serves as a pattern definition layer for subsequent etching steps, and remains in place to prevent wiring exposure during substrate cutting. This multi-functionality reduces the total number of separate processes required while achieving the goal of preventing exposed wirings.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents the influence of exposed wirings on display devices by cutting the wiring during the original process, reducing the number of steps and enhancing production efficiency and reliability.
Implementation Method 1
a step (d) of etching and patterning the semiconductor layer and the metallic layer through the etching resist so as to form a wiring from the metallic layer and leave the semiconductor layer under the wiring
Implementation Method 2
a step (g) of performing selective etching through the first portion, which is left unremoved, so as to leave the semiconductor layer unetched, to thereby pattern the wiring to be divided into a drain electrode and a source electrode
Data Source
AI summary
An etching resist including first and second portions, the first portion being thicker than the second portion, is formed on a metallic layer. Through the etching resist, a semiconductor layer and the metallic layer are patterned by etching so as to form a wiring from the metallic layer and leave the semiconductor layer under the wiring. An electrical test is conducted on the wiring. The second portion is removed while the first portion is left unremoved. Selective etching is performed through the first portion so as to leave the semiconductor layer unetched to pattern the wiring to be divided into drain and source electrodes. A substrate is cut. In patterning the wiring, the wiring is etched to be cut at a position closer to a cutting line of the substrate with respect to the drain and source electrodes, while leaving the semiconductor layer unetched.