Semiconductor Wiring Layout With Diffusion Barriers for Lower Capacitance
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Solution Overview
Problem
As semiconductor devices miniaturize, the increased capacity between wiring lines leads to signal delay and interference with processing speed and power consumption, necessitating a reduction in wiring capacity while maintaining performance.
Innovation Solution
A wiring structure with a gap between wiring lines, featuring a metal film and a barrier metal layer to prevent diffusion, and an insulating film to cover the metal film, reducing parasitic capacity and expanding intervals between wiring lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If wiring lines are narrowed to increase integration density, then device miniaturization is achieved, but capacity between wiring lines increases causing signal delay and interference
Solution Approach 1:
The patent extracts the air gap between adjacent wiring lines by filling it with insulating films (first insulating film and second insulating film). This removes the harmful capacitive coupling medium while maintaining the narrow spacing for miniaturization, thereby reducing parasitic capacity without sacrificing device size benefits
Solution Approach 2:
The patent introduces insulating films as intermediary materials between the wiring lines and surrounding structures. These insulating films act as mediators that prevent metal diffusion and reduce capacitive coupling, enabling narrow wiring spacing while maintaining signal integrity and preventing interference
2Reliability
If gaps are formed between wiring lines to reduce capacity, then signal interference is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the insulating structure into multiple distinct films: a first insulating film with gaps between wiring lines and a second insulating film filling the remaining spaces. This segmentation allows each film to perform specific functions (capacity reduction vs. diffusion prevention) while maintaining a manageable manufacturing process through sequential deposition
Solution Approach 2:
The patent applies different insulating materials to different regions: the first insulating film is used where gap formation is critical for capacity reduction, while the second insulating film is used where diffusion prevention is prioritized. This local differentiation optimizes performance while simplifying the overall manufacturing by using standard deposition processes
3Reliability
If barrier metal layers are added to prevent metal diffusion, then wiring reliability is improved, but manufacturing steps increase
Solution Approach 1:
The patent merges the barrier metal layer formation with the existing metal film deposition process. The barrier metal layer is deposited as part of the wiring line structure itself, combining multiple functions (conduction and diffusion barrier) into a single integrated process step, thereby improving reliability without proportionally increasing manufacturing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces parasitic capacity between wiring lines, enhancing processing performance and reducing signal delay while maintaining low power consumption.
Implementation Method 1
The barrier metal layer partially covers surroundings of the metal film in a cross section orthogonal to the first direction and includes a second metal material. The second metal material prevents diffusion of the first metal.
Implementation Method 2
The insulating material prevents diffusion of the first metal.
Data Source
AI summary
Provided is a semiconductor device with a wiring layer including a plurality of wiring lines extending in a first direction; a first insulating film stacked on the wiring layer that has a gap region between the plurality of wiring lines adjacent to each other in a second direction; and a second insulating film between the plurality of wiring lines and the first insulating film. Each wiring line includes a metal film and a barrier metal layer. The metal film includes an electrically conductive material including a first metal. The barrier metal layer partially covers surroundings of the metal film in a cross section orthogonal to the first direction and includes a material including a second metal. The second metal prevents diffusion of the first metal. The second insulating film includes an insulating material and covers a portion of the metal film. The insulating material prevents diffusion of the first metal.