Wiring Formation via Staircase Etching to Prevent Gate Shorts

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In the process of forming wirings that contact two contact plugs on a substrate, existing methods often result in undesired recesses between the plugs, leading to potential electrical shorts with underlying semiconductor devices, particularly gate structures, due to the integration challenges in semiconductor device manufacturing.

Innovation Solution

A method involving sequential formation of insulation and hardmask layers, where the second layer is etched to create a staircase-shaped recess overlapping contact plugs, and the first layer is etched to form a matching recess pattern without exposing the gate structure, ensuring the wiring is insulated from the gate and preventing electrical shorts by using materials with high etch selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing methods are used to form wirings contacting two contact plugs, then the wiring can contact both plugs, but undesired recesses are formed between the plugs causing potential electrical shorts with underlying gate structures

Engineering Contradiction:
Improveelectrical insulationVSAvoidrecess formation control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the etching process into multiple sequential steps with different mask patterns. The first mask pattern etches the second layer to form a first recess, and the second mask pattern etches the first layer to form a second recess. This segmentation allows precise control over the recess formation to prevent electrical shorts while maintaining wiring contact with both plugs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent forms the first recess in the second layer before forming the second recess in the first layer. This preliminary action ensures that the underlying gate structure is protected from direct exposure, preventing electrical shorts before the wiring formation process completes.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If the second layer is etched to create a staircase-shaped recess, then the wiring can contact both contact plugs, but the complex multi-step etching process increases manufacturing complexity

Engineering Contradiction:
Improvewiring contact formationVSAvoidetching process steps
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The complex etching process is segmented into distinct steps with specific mask patterns. The first mask pattern (extending beyond the second contact plug) etches the second layer, and the second mask pattern (aligned with the first contact plug) etches the first layer. This segmentation makes the complex process manageable and repeatable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different mask patterns are used in different locations to achieve the desired staircase-shaped recess. The first mask pattern creates a wider etch region, while the second mask pattern creates a more precise etch region. This local quality approach allows the complex recess shape to be formed through localized actions.

Inventive Principle:
Principle #3Local quality

3Reliability

If the first layer is etched to form a matching recess pattern without exposing the gate structure, then electrical shorts are prevented, but the etch selectivity requirements increase material selection constraints

Engineering Contradiction:
Improveelectrical short preventionVSAvoidmaterial selection flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the etch selectivity parameters by choosing specific materials for the first and second layers. The first layer has higher etch selectivity with respect to the insulating interlayer than the second layer, allowing the second layer to be etched first without completely removing the underlying insulation. This parameter change enables the multi-step etching process to work effectively.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure with an insulating interlayer, a first layer, and a second layer, where each layer has different etch selectivity characteristics. This composite material approach allows the etching process to selectively remove materials in a controlled sequence, preventing gate structure exposure while maintaining electrical insulation.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of wirings that contact both contact plugs without creating recesses that could lead to electrical shorts, enhancing semiconductor device integration and reducing defects by maintaining insulation from the gate structure, thus improving electrical characteristics.

Implementation Method 1

etching an upper portion of the second layer a plurality of times to form a second layer pattern including a first recess having a shape of a staircase

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

etching a portion of the second layer pattern and a portion of the first layer under the first recess to form a first layer pattern including a second recess

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

using materials with high etch selectivity

Methodology Applied
Scientific EffectEtch selectivity:

Data Source

PatentUS9287161B2Method of forming wirings
Publication Date: 2016.03.15 SAMSUNG ELECTRONICS CO LTD
  • US9287161B2 patent drawing
  • US9287161B2 patent drawing
  • US9287161B2 patent drawing

AI summary

A method of manufacturing a wiring includes sequentially forming a first insulation layer, a first layer, and a second layer on a substrate, etching an upper portion of the second layer a plurality of times to form a second layer pattern including a first recess having a shape of a staircase, etching a portion of the second layer pattern and a portion of the first layer under the first recess to form a first layer pattern including a second recess having a shape of a staircase similar to the first recess, etching a portion of the first layer pattern under the second recess to form a first opening exposing a portion of a top surface of the first insulation layer, etching the exposed portion of the first insulation layer to form a second opening through the first insulation layer, and forming a wiring filling the second opening.