Semiconductor Wiring Structure for Interconnect Resistance Control
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Solution Overview
Problem
Existing semiconductor manufacturing processes face challenges in effectively controlling the resistance of metal interconnections during the back-end-of-line phase, as they often result in inconsistent and suboptimal electrical connections due to uniform critical dimensions of conductive features.
Innovation Solution
A wiring structure is designed with conductive features having different critical dimensions, where a first conductive feature is connected to a semiconductor element and a second conductive feature is surrounded by an insulative liner, with the sum of the second critical dimension and twice the thickness of the insulative liner equal to the first critical dimension, allowing for precise resistance control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If uniform critical dimensions are used for all conductive features, then manufacturing process is simpler, but resistance control is inconsistent and suboptimal
Solution Approach 1:
The patent applies local quality by assigning different critical dimensions to different conductive features based on their specific electrical requirements. First conductive features have a first critical dimension while second conductive features have a second critical dimension, allowing each feature to be optimized for its local electrical performance needs rather than using a uniform dimension across all features.
Solution Approach 2:
The patent changes the critical dimension parameter of conductive features to optimize resistance control. By varying the critical dimension parameter between different conductive features (first critical dimension vs. second critical dimension), the patent achieves precise resistance management while maintaining manufacturing feasibility through defined relationships between dimensions.
2Reliability
If different critical dimensions are used for conductive features, then resistance control is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements local quality by tailoring the critical dimensions of individual conductive features to their specific electrical connection requirements. This ensures that each conductive feature achieves optimal reliability for its function while the overall manufacturing process remains manageable through systematic dimension assignment.
Solution Approach 2:
The patent modifies the critical dimension parameter of conductive features to enhance electrical connection consistency and reliability. By establishing defined relationships between the first and second critical dimensions, the patent achieves improved reliability without excessively complicating the manufacturing process.
3Reliability
If insulative liner thickness is increased, then isolation of second conductive feature is improved, but total dimension increases
Solution Approach 1:
The patent changes the dimensional parameters by establishing a defined relationship between the critical dimensions and insulative liner thickness. The relationship (first critical dimension = second critical dimension + 2 × insulative liner thickness) allows optimization of isolation while controlling the overall dimension, balancing reliability requirements with space constraints.
Data Source
AI summary
The present application provides a wiring structure, a semiconductor device having the wiring structure, and a method of manufacturing the semiconductor device. The wiring structure includes a substrate, a metallic layer above the substrate, at least one first conductive feature and at least one second conductive feature. The first and second conductive features are disposed between the substrate and the metallic layer; the first conductive feature has a first critical dimension, and the second conductive feature has a second critical dimension less than the first critical dimension. An effective resistance of the wiring structure can be adjusted by changing the critical dimensions of the first and second conductive features. The semiconductor device including the wiring structure and a method of manufacturing the semiconductor device are also provided.