Wiring Substrate Build-Up Patterning for 2 μm Line-and-Space
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for manufacturing wiring substrates face challenges in forming conductor layers with fine wirings and inter-wiring distances, particularly in achieving minimum widths and distances of 2 μm or less, which affects the electrical performance and manufacturing yield.
Innovation Solution
A method involving direct imaging exposure is used to form resist patterns for conductor layers, allowing for the creation of wirings with minimum widths and inter-wiring distances of 2 μm or less, along with a laminated structure of conductor and insulating layers, enhancing the electrical characteristics and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional exposure methods are used to form resist patterns, then the manufacturing process is simpler, but the wiring width and inter-wiring distance cannot achieve 2 μm or less
Solution Approach 1:
The patent replaces conventional mechanical contact exposure methods with direct imaging exposure technology. This substitution enables the formation of resist patterns with wiring widths and inter-wiring distances of 2 μm or less, achieving the required manufacturing precision without the limitations of traditional mechanical exposure systems.
Solution Approach 2:
The patent changes the exposure method parameter from conventional contact or proximity exposure to direct imaging exposure. This parameter change allows for higher resolution pattern formation, enabling the creation of fine wirings with 2 μm or less width and spacing, thereby resolving the technical contradiction between precision and process complexity.
2Manufacturing precision
If multiple exposure processes are used to form conductor layers, then better coverage is achieved, but manufacturing time and complexity increase
Solution Approach 1:
The patent merges multiple exposure processes into a single direct imaging exposure step. By combining the functions of multiple sequential exposure operations into one integrated direct imaging process, the manufacturing time is reduced while maintaining or improving the quality of conductor layer formation through the higher precision of direct imaging technology.
Solution Approach 2:
The patent implements continuous direct imaging exposure across the entire substrate area in one operation, eliminating the interruptions and transitions between multiple separate exposure processes. This continuous action reduces manufacturing cycle time while ensuring uniform and high-quality conductor layer formation throughout the substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the electrical performance and manufacturing yield by enabling the formation of fine wirings and reducing the number of exposure processes, resulting in higher resolution and better flatness of the wiring substrate.
Implementation Method 1
the forming the resist layer having the resist pattern includes exposing the resist layer by direct imaging exposure
Data Source
AI summary
A method for manufacturing a wiring substrate includes forming a build-up part including conductor layers and insulating layers across one or more product areas on a support substrate such that the one or more product areas have a rectangular shape with each side in a range of 80 mm to 240 mm. The forming the build-up part includes forming a resist layer having a resist pattern and forming a conductor pattern according to the resist pattern, and forming wirings in the conductor pattern such that the wirings have a minimum width of 2 μm or less and a minimum inter-wiring distance of 2 μm or less, and the forming the resist layer having the resist pattern includes exposing the resist layer by direct imaging exposure.