Wiring Substrate Pad Spacing for Soldering Short-Circuit Prevention
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Solution Overview
Problem
Existing display device backplanes with multiple insulating layers increase thickness and production costs, and the absence of an insulating layer between adjacent pads leads to potential short circuits due to pin contact during soldering.
Innovation Solution
A wiring substrate design with pad groups featuring specific side orientations and distances between pads, utilizing an insulating layer with openings to cover signal lines, ensuring adequate spacing for soldering without short circuits and reducing thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple insulating layers are used to prevent short circuits between adjacent pads, then electrical insulation is improved, but the thickness and production cost increase
Solution Approach 1:
The patent extracts and removes unnecessary insulating layers from the conventional structure. By carefully designing pad spacing and orientation, the invention eliminates the need for multiple insulating layers while maintaining electrical insulation, thus reducing thickness and production cost.
Solution Approach 2:
The patent applies local quality by differentiating between selected sides (facing adjacent pads) and non-selected sides of pads. The selected sides maintain specific spacing to prevent short circuits, while non-selected sides can be positioned differently to optimize space utilization and reduce overall structure thickness.
2Reliability
If multiple insulating layers are used to prevent short circuits, then electrical insulation is improved, but production cost increases
Solution Approach 1:
The invention removes unnecessary insulating layers from the manufacturing process, reducing material costs and simplifying production steps while maintaining electrical insulation through optimized pad design.
Solution Approach 2:
The patent changes the spacing parameter between selected sides of adjacent pads to a specific range (30-100 μm), which provides electrical insulation without requiring additional insulating layers, thereby reducing production cost.
3Area of stationary object
If pad spacing is reduced to optimize space utilization, then area efficiency is improved, but short circuit risk increases due to pin contact during soldering
Solution Approach 1:
The patent applies different spacing requirements to different sides of pads: selected sides (facing adjacent pads) maintain spacing of 30-100 μm to prevent short circuits, while non-selected sides can be positioned to maximize space utilization.
Solution Approach 2:
The invention introduces asymmetric pad positioning where selected sides have specific spacing constraints to prevent short circuits, while non-selected sides have different positioning requirements to optimize space utilization, creating an asymmetric but efficient layout.
Data Source
AI summary
The present disclosure provides a wiring substrate, a method manufacturing the same, and an electronic device. The wiring substrate includes a base substrate, a plurality of pad groups on the base substrate, each pad group including at least two pads. Two pads adjacent in a first direction or a second direction of the at least two pads are spaced apart. Each pad includes a plurality of sides including at least one selected side and at least one non-selected side, any one pad is adjacent to another pad along the first direction or the second direction, the selected side of the any one pad is a side facing the adjacent another pad, and a distance between the selected side of the any one pad facing the adjacent another pad and the selected side of the adjacent another pad facing the any one pad is ≥30 μm and <100 μm.