Wiring Substrate Raised Solder Resist for Flat Mounting
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional wiring substrates for semiconductor apparatuses experience unevenness due to vias and wirings, leading to bubble formation and separation issues between the semiconductor chip and the substrate during mounting, especially when temperature increases.
Innovation Solution
A wiring substrate design featuring a conductor layer laminated on both surfaces of a substrate core with penetrating vias, a bonding pad positioning area, and a solder resist applied to form a raised portion in the center, reducing unevenness and preventing separation by thickening the solder resist in the semiconductor chip mounting area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vias and wirings are provided on the substrate core, then electrical connection functionality is improved, but surface unevenness increases leading to bubble formation and separation
Solution Approach 1:
The patent applies a thick solder resist layer specifically in the chip mounting area (center portion) where flatness is critical, while using a thin solder resist layer in peripheral areas where electrical connection structures (vias and wirings) are located. This local differentiation allows the center area to maintain high surface flatness for reliable chip mounting, while peripheral areas maintain the necessary electrical connection functionality with minimal interference from the solder resist.
2Object-affected harmful factors
If solder resist is applied to cover vias and wirings, then surface protection is improved, but bubble formation occurs due to trapped air
Solution Approach 1:
The patent implements a dual-layer solder resist structure with different thicknesses in different regions. The thin solder resist layer in peripheral areas allows air to escape during the coating process, preventing bubble formation, while the thick solder resist layer in the center area provides sufficient surface protection and flatness. This local quality differentiation resolves the contradiction between protection and bubble prevention.
3Manufacturing precision
If uniform thick solder resist is applied across the substrate, then surface flatness is improved, but electrical connection areas are obscured
Solution Approach 1:
The patent employs a non-uniform solder resist thickness distribution, with the thick layer confined to the chip mounting area and the thin layer extending to peripheral areas containing electrical connection structures. This local quality approach ensures that the thick solder resist provides the necessary surface flatness for chip mounting without obscuring the electrical connection areas, maintaining both flatness and electrical connection accessibility.
Data Source
AI summary
On a printed-wiring board 1-1, a conductor layer 2 is laminated to both the top surface and the bottom surface of a substrate core 7 so as to pattern the substrate core, and a solder resist 4 is laminated to the substrate core. The solder resist 4 laminated to the top surface of the printed-wiring board 1-1 forms a raised portion 40 in a semiconductor chip mounting area such that the thickness of the raised portion is greater than the thickness of the solder resist 4 laminated to areas other than the semiconductor chip mounting area, so that the surface of the semiconductor chip mounting area is flat.