Wiring Substrate Recessed Bump Design for Thermal Stress
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Solution Overview
Problem
Conventional flip-chip mounting techniques face challenges with bump deformation due to external forces, affecting connection reliability between semiconductor elements and bumps on wiring substrates, especially under thermal stress and miniaturization, where finer bumps increase stress concentrations and breakage risks.
Innovation Solution
The proposed wiring substrate design features a recessed structure with tapered bumps integrated with via wirings, where the bumps are surrounded by an insulation layer, reducing external force impact and stress concentrations, and the connection interface is shifted away from potential stress points, enhancing reliability against physical and thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If bumps are entirely exposed to the exterior for connection purposes, then connection accessibility is improved, but bump deformation under external force increases
Solution Approach 1:
The patent applies local quality by creating a recess structure where the bump is partially embedded in the insulation layer rather than fully exposed. This localized structural modification allows the bump to maintain its connection function while being protected from external forces, thus resolving the contradiction between accessibility and reliability.
Solution Approach 2:
The recess structure acts as a cushioning mechanism that absorbs external forces before they reach the bump. By pre-positioning the bump in a protected state within the recess, the structure reduces the impact of external forces, thereby maintaining connection reliability while still allowing for electrical connection.
2Length of moving object
If bump size is reduced for miniaturization, then device size is reduced, but stress concentration and breakage risk increase
Solution Approach 1:
The recess structure provides localized protection to the bump, creating a stress-distributing environment that compensates for the reduced size of the bump. This allows miniaturization to proceed while maintaining adequate strength through the protective recess geometry.
Solution Approach 2:
The recess acts as a pre-positioned cushioning structure that absorbs and distributes stress before it concentrates on the bump. This protective mechanism allows smaller bumps to withstand external forces that would otherwise cause breakage, enabling device miniaturization without sacrificing reliability.
3Ease of manufacture
If bumps are fully exposed for mounting, then mounting process is simplified, but deformation under thermal stress increases
Solution Approach 1:
The recess structure creates a localized protected environment for the bump during the mounting process. This allows the bump to remain accessible for electrical connection while being thermally protected, thus maintaining stability without significantly complicating the manufacturing process.
Data Source
AI summary
The wiring substrate includes an insulation layer that includes a lower surface, an upper surface, and an intermediate surface located between the lower surface and the upper surface. A first wiring layer is formed on the lower surface of the insulation layer. A second wiring layer is formed on the intermediate surface of the insulation layer. A recess is formed in the upper surface of the insulation layer. The recess overlaps, in a plan view, a first through hole that extends through the insulation layer. The first through hole is filled with a via wiring, which is formed integrally with the first wiring layer. A bump is formed integrally with the via wiring and projected into the recess. An upper end surface of the bump is located above an upper surface of the second wiring layer.