Roughened Wiring Substrate Seed Layer to Prevent Pattern Shorting

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Solution Overview

Problem

Existing wiring substrates face issues with short circuits between conductor patterns due to incomplete removal of the seed layer during etching, and adhesion strength between the insulating layer and conductor layer is compromised.

Innovation Solution

A wiring substrate design where the insulating layer surface is roughened to expose inorganic particles and resin with gaps, and a seed layer is formed along these exposed portions without filling the gaps, using sputtering to enhance adhesion and prevent short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the seed layer is formed completely on the insulating layer surface, then adhesion strength is improved, but short circuits between conductor patterns occur due to incomplete removal during etching

Engineering Contradiction:
Improveadhesion strengthVSAvoidshort circuit prevention
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The seed layer is formed only on the exposed portions of inorganic particles and resin at the roughened surface, rather than uniformly across the entire surface. This local formation ensures the seed layer provides adhesion where needed while avoiding gaps that could lead to short circuits during etching.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulating layer surface is roughened in advance to create exposed portions of inorganic particles and resin before seed layer formation. This preliminary surface modification ensures the seed layer will form only on appropriate areas, preventing short circuits while maintaining adhesion strength.

Inventive Principle:
Principle #10Preliminary action

2Strength

If the insulating layer surface is made rough to expose inorganic particles, then seed layer adhesion is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveseed layer adhesionVSAvoidsurface processing complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The surface roughness of the insulating layer is controlled to specific parameters (Ra 0.05-0.2 μm) to achieve the desired exposure of inorganic particles. By optimizing this parameter, the surface provides adequate adhesion areas without requiring overly complex processing.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the seed layer is formed only along exposed portions, then short circuits are prevented, but adhesion strength may be compromised

Engineering Contradiction:
Improveshort circuit preventionVSAvoidadhesion strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The insulating layer is formed as a composite of inorganic particles and resin, where both materials contribute to adhesion. The inorganic particles provide anchoring points for the seed layer, while the resin matrix maintains structural integrity. This composite structure enables the seed layer to form only on exposed portions while still achieving sufficient adhesion strength.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents short circuits between conductor patterns and maintains high adhesion strength by forming the seed layer only along the exposed inorganic particles and resin, ensuring effective conductor pattern formation and improved substrate integrity.

Implementation Method 1

forming a seed layer on the roughened surface of the insulating layer such that the seed layer is formed along the exposed portions of the inorganic particles and resin exposed on the roughened surface of the insulating layer

Methodology Applied
Scientific EffectSputtering: Sputtering

Data Source

PatentUS12484159B2Wiring substrate and method for manufacturing the same
Publication Date: 2025.11.25 IBIDEN CO LTD
  • US12484159B2 patent drawing
  • US12484159B2 patent drawing
  • US12484159B2 patent drawing

AI summary

A wiring substrate includes an insulating layer including inorganic particles and resin, a seed layer formed on a surface of the insulating layer, and a conductor layer including a conductor pattern and formed on the seed layer. The surface of the insulating layer is a roughened surface formed such that the roughened surface of the insulating layer has exposed portions of the inorganic particles and resin with gaps at interfaces where the inorganic particles and the resin are in contact, and the seed layer is formed on the roughened surface of the insulating layer such that the seed layer is formed along the exposed portions of the inorganic particles and resin exposed on the roughened surface of the insulating layer and is not formed in the gaps at the interfaces where the inorganic particles and the resin are in contact.