Wiring Substrate With Segmented Test Terminals For Semiconductor Stacking

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Solution Overview

Problem

Current stacked semiconductor module manufacturing processes face challenges in testing and reliability, leading to low yields and increased costs due to the need for separate testing of each semiconductor device before stacking, which can result in scratched connecting terminals and high testing equipment costs.

Innovation Solution

A substrate for wiring with strategically placed test terminals and external electrode terminals allows for efficient testing without scratching the connecting terminals, reducing the number of test wires and terminals, and using shared test terminals across multiple pieces to minimize costs and ensure reliable connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If test terminals are placed on the same region as connecting terminals, then testing can be conducted directly, but the connecting terminals may be scratched during testing

Engineering Contradiction:
Improveconnection reliabilityVSAvoidterminal scratching
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The substrate surface is divided into two distinct regions: a first region containing connecting terminals for electrical connection, and a second region containing test terminals for testing. This spatial segmentation allows testing operations to be performed without contacting the connecting terminals, preventing scratches while maintaining connection reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Test terminals serve as intermediary contact points that enable testing functionality without directly involving the connecting terminals. By routing test signals through dedicated test terminals rather than connecting terminals, the connecting terminals are protected from mechanical damage during testing operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If separate testing of each semiconductor device is conducted before stacking, then reliability can be guaranteed, but manufacturing cost and complexity increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidtesting system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The testing functionality is merged into the substrate itself through integrated test terminals and test wiring patterns. This allows multiple devices to be tested simultaneously using a single substrate, eliminating the need for separate testing equipment for each device and reducing overall testing system complexity while maintaining reliability guarantees.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate serves multiple functions: it provides mechanical support, establishes electrical connections through connecting terminals, and enables testing through test terminals. This multi-functionality reduces the need for separate dedicated testing fixtures and equipment, thereby reducing manufacturing complexity and cost.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If test wiring patterns are added to the substrate, then testing capability is improved, but substrate complexity and manufacturing cost increase

Engineering Contradiction:
Improvetesting easeVSAvoidsubstrate complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

Test wiring patterns are localized to specific regions of the substrate (the second region containing test terminals) rather than being distributed throughout the entire substrate. This localized approach provides testing capability where needed while minimizing the overall complexity and manufacturing cost of the substrate.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8125792B2Substrate for wiring, semiconductor device for stacking using the same, and stacked semiconductor module
Publication Date: 2012.02.28 PANASONIC SEMICON SOLUTIONS CO LTD
  • US8125792B2 patent drawing
  • US8125792B2 patent drawing
  • US8125792B2 patent drawing

AI summary

In a stacked semiconductor module, a test covering connecting terminals is easily conducted and high reliability is achieved.