Wiring Substrate Solder Resist Layer Design for Ion Migration Prevention
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Solution Overview
Problem
In semiconductor packages, the migration of metal ions due to water ingress into the solder resist layer, caused by fillers with grain diameters larger than the wiring pitch, leads to electrical short circuits and reduced dielectric resistance, while reducing filler size compromises viscosity, printability, and water resistance.
Innovation Solution
A wiring substrate with a solder resist layer composed of multiple layers, where the innermost layer has a filler grain diameter smaller than the wiring pitch and no secondary aggregation, and the outer layers contain fillers with larger grain diameters to optimize viscosity and printability while preventing migration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If fillers with large grain diameters are used in the solder resist layer, then viscosity, printability, and water resistance are improved, but metal ion migration occurs and dielectric resistance decreases
Solution Approach 1:
The solder resist layer is divided into multiple layers with different filler grain diameters. The lower layer uses larger grain diameter fillers (5-20 μm) to optimize viscosity and printability, while the upper layer uses smaller grain diameter fillers (2-10 μm) to prevent metal ion migration and maintain dielectric resistance. This segmentation allows each layer to fulfill its specific function without compromising overall performance.
Solution Approach 2:
Different regions of the solder resist layer are assigned different filler characteristics tailored to their specific functional requirements. The lower layer near the wiring uses larger fillers for manufacturing advantages, while the upper layer exposed to potential water ingress uses smaller fillers for reliability. This local differentiation resolves the contradiction by optimizing each region for its primary function.
2Reliability
If filler grain diameter is reduced to prevent migration, then dielectric resistance is maintained, but viscosity and printability deteriorate
Solution Approach 1:
The solder resist layer is divided into multiple layers with different filler grain diameters. The lower layer uses larger grain diameter fillers (5-20 μm) to optimize viscosity and printability, while the upper layer uses smaller grain diameter fillers (2-10 μm) to prevent metal ion migration and maintain dielectric resistance. This segmentation allows each layer to fulfill its specific function without compromising overall performance.
Solution Approach 2:
Different regions of the solder resist layer are assigned different filler characteristics tailored to their specific functional requirements. The lower layer near the wiring uses larger fillers for manufacturing advantages, while the upper layer exposed to potential water ingress uses smaller fillers for reliability. This local differentiation resolves the contradiction by optimizing each region for its primary function.
3Device complexity
If a single-layer solder resist structure is used, then manufacturing is simplified, but sufficient thickness and protective function are compromised
Solution Approach 1:
The solder resist layer is divided into multiple layers with different filler grain diameters. The lower layer uses larger grain diameter fillers (5-20 μm) to optimize viscosity and printability, while the upper layer uses smaller grain diameter fillers (2-10 μm) to prevent metal ion migration and maintain dielectric resistance. This segmentation allows each layer to fulfill its specific function without compromising overall performance.
Data Source
AI summary
A wiring substrate includes: an insulating layer; a wiring formed on the insulating layer; and a solder resist layer formed on the insulating layer so as to cover at least a portion of the wiring, the solder resist layer being constituted by a plurality of layers, wherein the plurality of layers contain fillers of different grain diameters, a layer thickness of an innermost layer for constituting the plurality of layers is thicker than a layer thickness of the wiring, and a grain diameter of the filler contained in the innermost layer is smaller than a shortest interval between adjacent lines of the wiring.


