Wiring Substrate Terminal Interconnects for ESD Noise Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing touch screen panels face challenges in preventing noise currents caused by electrostatic discharge from flowing into control circuits, especially in central screen areas, as recent trends towards larger screen sizes make it difficult for traditional shield interconnects to effectively protect against such noise.

Innovation Solution

A wiring board design with specific terminal interconnects having a line width of 5 μm to 100 μm and a resistance value of 100 ohms to 10 kohms, featuring a pattern with bends and capacitors to store and discharge static electricity, effectively preventing noise currents from reaching the control circuit while allowing for increased screen size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If shield interconnects are formed outside of terminal interconnects to prevent electrostatic discharge noise, then protection against noise is improved, but for larger screen sizes, shield interconnects cannot prevent noise current from central screen areas from flowing into the control circuit

Engineering Contradiction:
Improveprotection against electrostatic discharge noiseVSAvoidscreen size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the interconnect structure into multiple segments with different resistance characteristics. Terminal interconnects have higher resistance (100-10,000 ohms) to limit noise current, while other interconnects maintain lower resistance for signal integrity. This segmentation allows different regions to serve different functions in noise protection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different resistance values to different interconnects based on their location and function. Terminal interconnects connected to the control circuit have higher resistance to protect against noise, while interconnects in other areas have lower resistance. This local differentiation optimizes both noise protection and signal transmission.

Inventive Principle:
Principle #3Local quality

2Reliability

If terminal interconnect line width is reduced to lower resistance, then electrical connection quality is improved, but the interconnect becomes more susceptible to electrostatic discharge damage

Engineering Contradiction:
Improveelectrical connection qualityVSAvoidelectrostatic discharge susceptibility
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the resistance parameter of terminal interconnects to a specific range (100-10,000 ohms) that balances electrical connection quality with electrostatic discharge protection. This parameter optimization allows the interconnect to function effectively while limiting harmful noise current.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If shield interconnects are added to protect against electrostatic discharge, then noise protection is improved, but device complexity increases

Engineering Contradiction:
Improvenoise current preventionVSAvoidinterconnect structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes terminal interconnects serve multiple functions: they provide electrical connection between terminals and the control circuit, and simultaneously protect against noise current through their higher resistance. This multi-functionality eliminates the need for separate shield interconnects, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents noise currents due to electrostatic discharge in both peripheral and central screen areas, promoting larger touch screen panel sizes while maintaining minimal resistance value increases.

Implementation Method 1

an interconnect resistance value of each of the terminal interconnects is 100 ohms or more and 10 kohms or less

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Implementation Method 2

an electroconductive section that includes a plurality of electrodes disposed on the surface of the insulating board, a plurality of terminals disposed on the surface of the insulating board in corresponding relation to the electrodes, for electric connection to an external circuit, and terminal interconnects disposed on the surface of the insulating board and configured to electrically connect the electrodes respectively to the terminals corresponding thereto

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS9727196B2Wiring substrate
Publication Date: 2017.08.08 FUJIFILM CORP
  • US9727196B2 patent drawing
  • US9727196B2 patent drawing
  • US9727196B2 patent drawing

AI summary

A wiring board includes a plurality of first terminal parts for electrically connecting with a control circuit and disposed corresponding to a plurality of first electrode parts, and first terminal wiring parts for electrically connecting the plurality of first electrode parts and the corresponding first terminal parts. Each of the first terminal wiring parts has, in at least a portion thereof falling in a circle with a radius of 10 mm centering around a boundary part between the first terminal wiring parts and the corresponding first terminal parts, a portion having a line width of 5 μm to 100 μm inclusive, the wiring resistance value of the first terminal wiring parts connected to the first terminal parts being 100 ohms to 10 kohms inclusive.