Wiring Substrate Thin Film Transistor Channel Width Design
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Solution Overview
Problem
The operational characteristics of thin film transistors in scan drivers deteriorate when high source-drain voltage is applied, affecting the durability and reliability of display devices, particularly in larger display devices.
Innovation Solution
A display device and wiring substrate design where the first thin film transistor in the non-display area has a greater channel width than the overlap length of its gate, semiconductor, and drain patterns, while the second thin film transistor in the display area has a specific structure with overlapping gate and semiconductor patterns, minimizing the impact of source-drain voltage stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If high source-drain voltage is applied to the thin film transistor in the scan driver, then the display device can function as a larger size, but the operational characteristics of the thin film transistor deteriorate
Solution Approach 1:
The patent applies different channel widths to thin film transistors based on their location and function. Specifically, the first thin film transistor in the non-display area has a channel width greater than the overlap length of gate, semiconductor, and drain patterns, while the second thin film transistor in the display area has a different structural configuration. This local differentiation allows the non-display area transistor to withstand high source-drain voltage stress without deterioration, enabling larger display device sizes while maintaining reliability.
2Reliability
If the channel width of the first thin film transistor is increased, then the deterioration of the thin film transistor is suppressed, but the area occupied by the transistor increases
Solution Approach 1:
The patent implements local quality by configuring the first thin film transistor with a channel width greater than the overlap length only in the non-display area where high voltage stress occurs, while the second thin film transistor in the display area uses a different configuration optimized for its specific requirements. This targeted approach improves durability where needed without unnecessarily increasing the overall transistor area across the entire display device.
Data Source
AI summary
A display device in which a display area and a non-display area are defined, the display device including a wiring substrate, the wiring substrate including: a base substrate; a first thin film transistor disposed on the base substrate, located in the non-display area, and including a first gate pattern, a first semiconductor pattern disposed on the first gate pattern, a first source pattern disposed on the first semiconductor pattern, and a first drain pattern disposed on the first semiconductor pattern and spaced apart from the first source pattern; and a second thin film transistor disposed on the base substrate and located in the display area. A first channel width of the first thin film transistor is greater than a first overlap length of the first gate pattern, the first semiconductor pattern, and the first drain pattern.


