Wiring Substrate Undercut Layout for Dense Interconnect Spacing

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Solution Overview

Problem

Existing wiring technologies face challenges in maintaining inter-wiring distances and preventing peeling or short circuits while ensuring minimal reduction in wiring width, especially in densely packed wirings.

Innovation Solution

The wiring substrate design includes a conductor layer with wirings that have undercut parts on side surfaces, with the undercut part on the side facing an adjacent wiring being smaller than that on the side farther from the adjacent wiring, and a manufacturing process that forms these undercut parts using electroless and electrolytic plating, followed by selective etching to maintain inter-wiring distances and reduce etching time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If uniform undercut parts are formed on all side surfaces of wirings, then manufacturing process is simplified, but inter-wiring distance cannot be maintained and peeling or short circuits occur

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidinter-wiring distance maintenance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by forming undercut parts with different dimensions on different side surfaces of the same wiring. Specifically, the undercut part on the side surface facing an adjacent wiring has a first dimension, while the undercut part on the side surface farther from the adjacent wiring has a second dimension that is larger than the first dimension. This localized differentiation allows the wiring structure to adapt to different spatial requirements, maintaining inter-wiring distances while preventing peeling and short circuits.

Inventive Principle:
Principle #3Local quality

2Strength

If larger undercut parts are formed on all wirings, then peeling is prevented, but wiring width reduction increases and short circuit risk increases in dense configurations

Engineering Contradiction:
Improvepeeling resistanceVSAvoidshort circuit risk
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The patent implements local quality by differentiating the undercut part dimensions based on the wiring's spatial relationship with adjacent wirings. The side surface farther from the adjacent wiring has a larger undercut part (second dimension) that provides enhanced peeling resistance, while the side surface facing the adjacent wiring has a smaller undercut part (first dimension) that maintains adequate spacing and reduces short circuit risk. This localized differentiation allows simultaneous achievement of peeling prevention and short circuit avoidance.

Inventive Principle:
Principle #3Local quality

3Object-affected harmful factors

If smaller undercut parts are formed on all wirings, then short circuit risk is reduced, but peeling resistance decreases

Engineering Contradiction:
Improveshort circuit riskVSAvoidpeeling resistance
Core Design Contradiction:
Object-affected harmful factorsVSStrength

Solution Approach 1:

The patent applies local quality by assigning different undercut part dimensions to different side surfaces of the wiring. The side surface facing the adjacent wiring has a smaller undercut part (first dimension) that reduces short circuit risk by maintaining adequate spacing, while the side surface farther from the adjacent wiring has a larger undercut part (second dimension) that provides sufficient peeling resistance. This spatially differentiated approach allows simultaneous optimization of both parameters.

Inventive Principle:
Principle #3Local quality

4Device complexity

If conventional plating methods are used, then manufacturing process is simple, but etching time increases and productivity decreases

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidetching time
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies preliminary action by forming the conductor layer with predetermined asymmetric undercut parts using electroless plating and electrolytic plating processes before the etching step. The electroless plating forms a base layer with initial undercut characteristics, and the electrolytic plating builds upon this with controlled deposition that creates the final asymmetric undercut profile. This preliminary formation of the desired undercut structure eliminates the need for extensive subsequent etching, thereby reducing etching time and improving productivity while maintaining manufacturing process simplicity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design ensures reliable wiring substrates with minimal reduction in line width, prevents peeling, and reduces the risk of short circuits, even in high-density wiring configurations.

Implementation Method 1

a conductor layer that is formed on the resin insulating layer and includes a seed layer and a metal film formed on the seed layer

Methodology Applied
Scientific EffectElectroless plating: Deposition (physical)

Implementation Method 2

a manufacturing process that forms these undercut parts using electroless and electrolytic plating

Methodology Applied
Scientific EffectElectrolytic plating: Electroplating

Data Source

PatentUS12563664B2Wiring substrate
Publication Date: 2026.02.24 IBIDEN CO LTD
  • US12563664B2 patent drawing
  • US12563664B2 patent drawing
  • US12563664B2 patent drawing

AI summary

A wiring substrate includes a resin insulating layer, and a conductor layer formed on the resin insulating layer and including a seed layer and a metal film formed on the seed layer such that the conductor layer has wiring patterns including wirings. The conductor layer is formed such that each of the wirings in the wiring patterns has undercut parts on side surfaces extending to the resin insulating layer, and the wirings in the conductor layer include outer wirings formed such that each of the outer wirings has the undercut part on the side surface facing an adjacent one of the wirings is smaller than the undercut part on the side surface farther from the adjacent one of the wirings.