Semiconductor Wiring and Via Patterning With a Single Template

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Solution Overview

Problem

Current semiconductor manufacturing methods require multiple processing steps to form wirings and vias, leading to increased complexity and potential for interface defects between wiring layers.

Innovation Solution

A wiring fabrication method using a template with recessed and groove portions to form both wirings and vias in fewer steps, where the template is pressed against a resist layer, hardened, and then used as a mask for etching, allowing for the simultaneous formation of a wiring and via as a single body.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple processing steps are used to form wirings and vias separately, then the formation of wiring layers is achieved, but the process complexity increases and interface defects may occur

Engineering Contradiction:

Improveinterface defect preventionVSAvoidprocessing steps

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the formation of wirings and vias into a single simultaneous patterning process. The template contains both wiring patterns and via hole patterns that are transferred to the resist layer in one step, eliminating the need for separate processing steps and reducing interface defects between differently formed structures.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The template serves multiple functions: it defines both wiring patterns and via hole patterns, acts as a mask for simultaneous etching of both features, and enables the formation of multiple wiring layers with their respective vias in an integrated manner. This multi-functionality reduces the overall number of processing steps required.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If a template is pressed against a resist layer to form patterns, then patterning efficiency is improved, but high pressure may damage the recessed portion of the template

Engineering Contradiction:

Improvepatterning efficiencyVSAvoidtemplate durability

Core Design Contradiction:

ProductivityVSStrength

Solution Approach 1:

The patent inverts the traditional template structure by making the recessed portion (via hole pattern area) protrude outward rather than being indented. This inversion allows the recessed portion to withstand pressing pressure without damage, while the groove portions (wiring pattern areas) remain protected from direct pressure exposure.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The template design creates an asymmetric structure where the recessed portion has a different geometry (protruding outward) compared to the groove portions. This asymmetric design optimizes the mechanical strength distribution, allowing the template to withstand pressing forces during patterning while maintaining the required pattern fidelity.

Inventive Principle:

Principle #4Asymmetry

3Reliability

If via and wiring are formed as separate structures, then manufacturing flexibility is maintained, but interface defects between layers increase

Engineering Contradiction:

Improveinterface qualityVSAvoidmanufacturing complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the formation of via holes and wirings into a single simultaneous etching process. Both features are defined by the same template and processed together, ensuring consistent interface quality and eliminating defects that would arise from separate formation processes. The via walls and wiring surfaces are created in the same process step, guaranteeing clean interfaces.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces the number of patterning processes, minimizes the risk of interface defects, and extends the template's usage life by avoiding high pressure on the recessed portion, resulting in a more efficient and reliable semiconductor device manufacturing process.

Implementation Method 1

pressing a first template having a first recessed portion and a second recessed portion provided at a bottom of the first recessed portion against a first film to form a first pattern

Methodology Applied

Scientific EffectMechanical pressure: Pressure Increase

Implementation Method 2

the template is pressed against a resist layer, hardened, and then used as a mask for etching

Methodology Applied

Scientific EffectPhotohardening: Photopolymerisation

Data Source

PatentUS11869866B2Wiring formation method, method for manufacturing semiconductor device, and semiconductor device

Publication Date: 2024.01.09 KIOXIA CORP

AI summary

According to one embodiment, a wiring fabrication method includes pressing a first template including a first recessed portion and a second recessed portion provided at a bottom of the first recessed portion against a first film to form a first pattern including a first raised portion, corresponding to the first recessed portion, and a second raised portion, corresponding to the second recessed portion. The second raised portion protrudes from the first raised portion once formed. After forming the first pattern, a first wiring, corresponding to the first raised portion, and a via, corresponding to the second raised portion, is formed using the first pattern.