WLAN Transmit Scheduler Partitioning for CPU Power Reduction

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Solution Overview

Problem

The complexity of the decision logic in IEEE 802.11 CSMA/CA systems requires significant CPU processing, leading to increased power consumption and performance demands, making software implementation of the TX-scheduler state-machine inefficient and costly.

Innovation Solution

The TX-scheduler state-machine is partitioned into two state-machines, one software-based (FTSM) and one hardware-based (STSM), with the most constrained real-time requirements allocated to STSM, reducing CPU processing time and power consumption by simplifying hardware and using a smaller CPU.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the TX-scheduler state-machine is implemented in software only, then the device complexity is reduced, but power consumption increases and CPU performance requirements increase

Engineering Contradiction:

ImproveTX-scheduler implementation complexityVSAvoidCPU power consumption

Core Design Contradiction:

Device complexityVSUse of energy by moving object

Solution Approach 1:

The TX-scheduler state-machine is divided into two separate state-machines: a first TX-scheduler state-machine (FTSM) executed in software and a second TX-scheduler state-machine (STSM) executed in hardware. This segmentation allows time-critical functions to be handled by hardware while less time-sensitive functions remain in software, reducing overall CPU power consumption while maintaining functional completeness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A control unit is introduced as an intermediary that receives control signals from the FTSM and generates control signals for the STSM. This intermediary layer coordinates between the software and hardware state-machines, enabling efficient interaction and reducing the burden on the CPU while maintaining precise control over the transmission scheduling process.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If the TX-scheduler state-machine is implemented in software only, then device complexity is reduced, but CPU performance requirements increase

Engineering Contradiction:

ImproveTX-scheduler implementation complexityVSAvoidCPU processing speed

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

Inventive Principle:

Principle #1Segmentation

3Measurement precision

If complex hardware and software solutions are used to implement multiple backoff counters, then measurement precision is improved, but device complexity increases and CPU time is wasted

Engineering Contradiction:

Improvebackoff counter measurement precisionVSAvoidhardware and software solution complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple backoff counters are implemented within a single hardware state-machine structure. The STSM handles multiple backoff counter operations simultaneously through unified hardware logic, eliminating the need for separate complex hardware circuits for each counter while maintaining precise measurement and control of all backoff periods.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS7672328B2WLAN transmit scheduler comprising an accelerated back-off function

Publication Date: 2010.03.02 SAMSUNG ELECTRONICS CO LTD

AI summary

This invention can generally be described as an overall transmit (TX) scheduler state-machine that is broken down into two different state-machines: One first TX-scheduler state-machine (FTSM), executed in software, and one second TX-scheduler state-machine (STSM) executed in hardware, which is operating in four different basic states. The functional partitioning between the two state-machines is such that the most constrained real-time requirements are allocated to the STSM, while all complex decisions and non time-critical controls are allocated to the FTSM. The invention also relates to a terminal comprising the invented transmit scheduler.