Wafer Level Chip Scale Package for LED Size Reduction
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Solution Overview
Problem
Conventional light-emitting diode (LED) packages face challenges in reducing size and cost while meeting the requirements of being light, thin, short, and small, due to the complexity of materials stacking and packaging processes.
Innovation Solution
The implementation of a wafer level chip scale package (WLCSP) technology, which includes a supporting member with conductive vias and a semiconductor structure with conductive layers, reduces package size and simplifies the process, enhancing light extraction efficiency by optimizing the arrangement of semiconductor layers and conductive connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional LED packages use multiple package materials stacked together, then the LED can be mounted with substrate side down onto submount via solder bump or glue material, but the package size becomes large and the package process becomes complex
Solution Approach 1:
The patent integrates the submount and LED package into a single integrated structure where the supporting member serves both as the package substrate and the mounting base. The conductive vias are formed directly through the supporting member, eliminating the need for separate submount and package materials, thus simplifying the package structure and manufacturing process while reducing overall package size
Solution Approach 2:
The patent removes the traditional multi-layer package structure (package substrate, submount, solder bumps, glue materials) and extracts only the essential functional elements: a supporting member with conductive vias and a semiconductor structure. This extraction simplifies the package to its core components, reducing complexity and size
2Ease of manufacture
If conventional LED packages use multiple package materials stacked together, then the LED can be mounted with substrate side down onto submount, but the package size becomes large
Solution Approach 1:
The supporting member integrates multiple functions: it serves as the package substrate, provides mechanical support, contains conductive vias for electrical connections, and acts as the mounting base. This consolidation of functions into a single component reduces the overall package volume while maintaining all necessary mounting and electrical connection capabilities
Solution Approach 2:
The patent transitions from a vertical stacking arrangement (multiple layers stacked upward) to a planar integration approach where conductive vias extend vertically through the supporting member while the semiconductor structure is mounted on the same plane. This dimensional reorganization reduces the overall package height and volume while maintaining electrical connection functionality
Data Source
AI summary
A light-emitting device is provided. The light-emitting device comprises: a supporting member having a top surface; a first conductive via and a second conductive via separated from the first conductive, wherein the first conductive via and the second conductive via each has only one through-hole in the supporting member; and a semiconductor structure on the top surface of the supporting member, wherein the semiconductor structure comprises a first conductive type semiconductor layer, a second conductive type semiconductor layer and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer, wherein the semiconductor structure overlays the second conductive via; and a conductive layer on a sidewall of the semiconductor structure and electrically connecting the first conductive via to one of the semiconductor layers.