WLCSP Socket Alignment Using Chamfered Pre-Centering
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Solution Overview
Problem
WLCSP technology faces challenges in package insertion into test sockets due to alignment issues with pogo pins, leading to potential damage of the fragile active surfaces of semiconductor devices, which hampers personalized production using reel-to-reel handling machines.
Innovation Solution
A method utilizing a vacuum cup to pick up semiconductor devices and align them with a nest member featuring chamfers, allowing mechanical pre-alignment without constraining placement accuracy, using a protective layer on the non-active surface to avoid direct contact with fragile edges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If auto-centering chamfers are used to align devices in test sockets, then centering capability is improved, but damage to fragile active surfaces occurs
Solution Approach 1:
The patent inverts the conventional alignment approach by using chamfers on the device body (而非 socket) to engage with vertical walls in the socket. This reversal allows the device's own geometry to provide centering while preventing contact between socket chamfers and fragile active surfaces, thus maintaining ease of centering without causing damage
Solution Approach 2:
The patent introduces an intermediary mechanism where non-active surfaces or protective layers act as mediators between the alignment features and fragile active surfaces. The chamfers engage with robust non-active surfaces while vertical walls provide the actual alignment constraint, preventing direct contact between alignment features and sensitive active areas
2Adaptability or versatility
If personalization is performed at wafer level before dicing, then customization capability is improved, but compatibility with reel-to-reel handling is worsened
Solution Approach 1:
The patent applies preliminary protective actions at the wafer level by adding robust non-active surfaces and protective layers before dicing. This preliminary structuring enables subsequent reel-to-reel handling and pick-and-place personalization by providing durable features that withstand automated handling while allowing customization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances alignment accuracy and prevents damage to fragile surfaces during handling, facilitating faster and more precise pick&place sampling and preproduction processes compatible with time-to-market strategies.
Implementation Method 1
a tool such as a vacuum cup can be used to pick up a die
Data Source
Figure 1~4
Figure 5A~5B
Figure 5C~5D
AI summary
Electrical contact formations such as bumps or solder balls (S) at a first surface (D1) of a Wafer Level Chip Scale Package, WLCSP semiconductor device are aligned with electrically conductive pins in an array of electrically conductive pins such as "pogo" pins. The semiconductor device (D) comprises, opposite the first surface (D1), a second surface (D2) protected by a protection layer (A). The method comprises aligning the semiconductor device (D) to a first alignment member (12) by exposing the protected second surface (D2) of the semiconductor device (D) to a chamfered surface (C12) in the first alignment member (12). A second alignment member (14) is aligned to the array of electrically conductive pins (P). The electrical contact formations (S) are aligned with respect to the array of electrically conductive pins (P) as desired in response to the first (12) and second (14) alignment members being mutually aligned (R1, R2), in response to the device (D) being "landed" onto the array of electrically conductive pins (P) .