Wafer Level Packaging Through Hole Interconnect Structure
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Solution Overview
Problem
Existing Wafer Level Chip Size Packaging (WLCSP) technologies face instability in connections and increased thickness, leading to reduced manufacturing efficiency and increased costs due to unreliable T-shaped connections and excessive packaging thickness.
Innovation Solution
A packaging structure featuring a through hole on the chip with an intermediate metal layer connected within it, filled with water-soluble sealing paint for electroplating, and a solder bump connected to the intermediate metal layer, which increases the contacting area and stability, and reduces thickness by eliminating the need for extension pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If T-shaped connection is used to connect pads and intermediate metal layer, then the structure is simple, but the connection reliability is poor and prone to break under extreme situations
Solution Approach 1:
The connection structure is segmented into multiple components: pad, through-hole, intermediate metal layer, and solder bump. This segmentation allows each component to perform its specific function optimally, with the intermediate metal layer providing a robust connection path that avoids the reliability issues of T-shaped connections.
Solution Approach 2:
The connection transitions from a two-dimensional T-shaped junction to a three-dimensional vertical path through the chip substrate. The intermediate metal layer extends vertically through the through-hole, creating a more reliable connection that distributes stress along the vertical axis rather than concentrating it at a horizontal junction point.
2Reliability
If extension pads are used to enlarge pad area for better bonding stability, then the bonding stability is improved, but the wafer area available for manufacturing is reduced
Solution Approach 1:
The pad area is locally enlarged only at the bonding interface where it is needed for stability, while the chip substrate itself maintains its original compact dimensions. The intermediate metal layer provides the extended bonding surface locally without increasing the overall chip footprint.
Solution Approach 2:
The intermediate metal layer is nested within the through-hole structure, effectively utilizing the vertical space within the chip substrate. This nested configuration provides extended bonding area without increasing the horizontal footprint, allowing more chips to be manufactured on the same wafer area.
3Area of moving object
If traditional packaging structure is used, then the connection area is limited, but the packaging thickness is excessive
Solution Approach 1:
The connection area is expanded by utilizing the vertical dimension through the through-hole and intermediate metal layer structure. This vertical expansion provides larger connection area without increasing the horizontal footprint, thereby reducing the overall packaging thickness while maintaining or improving connection capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the reliability and stability of connections while reducing the thickness of the packaging structure, allowing for more efficient use of wafer space and lower manufacturing costs by providing a larger contacting area and eliminating voids prone to occur in traditional methods.
Implementation Method 1
filled with water-soluble sealing paint for electroplating
Data Source
AI summary
The invention discloses a packaging structure and packaging method. The packaging structure includes a solder bump, a pad located on a front side of a chip, and an intermediate metal layer which connects the solder bump and the pad, wherein a through hole passing from a back side of the chip to the pad is provided on the chip, and the intermediate metal layer is connected to the pad within the through hole. In the packaging structure, a through hole is formed on the back side of the chip to expose the pad on the front side of the chip and the intermediate metal layer is connected to the pad within the through hole. This provides a relatively large contacting area therebetween. The connection thus formed is more reliable and stable, compared with the prior art structure.