WLCSP Under Bump Redistribution Layer Cavity Structure

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Solution Overview

Problem

The increasing complexity of integrating multiple electronic devices into a single silicon wafer for higher-functioning devices in compact areas poses challenges in manufacturing cost and product reliability, particularly in WLCSP component packaging.

Innovation Solution

A low-cost semiconductor device packaging method utilizing a redistribution layer with a cavity in a non-conductive layer to form an under bump structure, which simplifies the WLCSP process by providing interconnect traces from bond pads to solder balls, reducing manufacturing costs and enhancing product reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple electronic devices are integrated into a single silicon wafer to achieve higher-functioning devices in compact areas, then device functionality and compactness are improved, but manufacturing complexity and difficulty increase

Engineering Contradiction:

Improvedevice functionalityVSAvoidmanufacturing complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent divides the wafer into multiple individual device sites, each with its own separation structure. This segmentation allows each device to be processed and packaged independently while maintaining wafer-level integration benefits, thereby reducing manufacturing complexity despite high device density

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary under-bump structure with a cavity between the bond pad and the final bump formation. This intermediary structure simplifies the bonding process and improves alignment tolerance, addressing manufacturing difficulties associated with high-density integration

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If traditional WLCSP packaging processes are used, then device packaging is achieved, but manufacturing cost increases and product reliability may be compromised

Engineering Contradiction:

Improvepackaging processVSAvoidproduct reliability

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent performs preliminary formation of the under-bump structure with cavity preparation before final bump formation. This preliminary action ensures proper alignment and reduces defects, thereby improving product reliability while maintaining ease of manufacture

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The under-bump structure with cavity serves multiple functions simultaneously: it provides mechanical support, enables alignment tolerance, and facilitates solder ball attachment. This self-service approach improves reliability without adding significant manufacturing complexity

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS11728308B2Semiconductor device under bump structure and method therefor

Publication Date: 2023.08.15 NXP BV

AI summary

A method of manufacturing a semiconductor device is provided. The method includes depositing a non-conductive layer over a semiconductor die. An opening is formed in the non-conductive layer exposing a portion of a bond pad of the semiconductor die. A cavity is in the non-conductive layer with a portion of the non-conductive layer remaining between a bottom surface of the cavity and a bottom surface of the non-conductive layer. A conductive layer is formed over the non-conductive layer and the portion of the bond pad. The conductive layer is configured to interconnect the bond pad with a conductive layer portion over the cavity.