Wafer-Level Semiconductor Package with Exposed Solder Balls
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Solution Overview
Problem
Conventional semiconductor packages face complexities in manufacturing and lack optimization in package size and thermal performance, particularly in achieving better heat dissipation with a smaller size.
Innovation Solution
The method involves forming first and second dies on Ni/Au plating wafers, attaching smaller second dies to larger first dies with solder balls, and using a molding process to encapsulate them, resulting in exposed solder balls for improved heat dissipation and reduced package thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional semiconductor package manufacturing processes are used, then electrical connectivity and device functionality are achieved, but the manufacturing process becomes complicated and package size is not optimized
Solution Approach 1:
The patent merges multiple manufacturing steps into a single integrated process. Specifically, the substrate, multiple dies, and molding material are processed together in one molding operation rather than assembling pre-packaged components. This combining of steps simplifies the overall manufacturing process while achieving the same functional result of electrical connectivity and device protection.
Solution Approach 2:
The molding material serves multiple functions simultaneously: it packages and protects the dies and substrate, provides structural support, enables heat dissipation through exposed solder balls, and creates the final package geometry. This multi-functionality reduces the need for separate components or processes, thereby simplifying manufacturing.
2Temperature
If larger exposed area of the package is used, then better heat dissipation is achieved, but package size increases
Solution Approach 1:
The patent utilizes the vertical dimension by exposing solder balls on the top surface of the package rather than relying solely on lateral heat dissipation area. The solder balls act as thermal pathways extending upward, allowing heat to dissipate in the vertical direction. This dimensional approach enables effective heat dissipation without increasing the horizontal package footprint.
Solution Approach 2:
The patent creates localized high-performance thermal regions by positioning solder balls at specific locations on the package top surface. These exposed solder balls provide concentrated thermal pathways directly from the dies to the external environment, optimizing heat dissipation at critical locations rather than requiring uniform large-area heat sinks across the entire package.
3Reliability
If multiple dies are attached with insulating layers and wire bonds, then electrical connectivity is achieved, but package thickness increases
Solution Approach 1:
The patent combines the electrical interconnection function with the molding process itself. Instead of separately attaching dies with insulating layers and wire bonding, the molding material directly encapsulates the dies and substrate in their final positions, with conductive pathways established through the molding process. This integration eliminates the thickness contributions of separate insulating layers and wire bond assemblies.
Solution Approach 2:
The patent extracts and eliminates unnecessary intermediate layers from the traditional packaging process. By removing the need for separate insulating layers between dies and substrate, and replacing wire bonding with direct molding encapsulation, the design achieves electrical connectivity through a more compact structure, thereby reducing overall package thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces package thickness, and enhances thermal performance by exposing solder balls for better heat dissipation while maintaining electrical connectivity.
Implementation Method 1
exposed solder balls for improved heat dissipation
Implementation Method 2
a molding process to encapsulate them
Implementation Method 3
exposed solder balls for improved heat dissipation while maintaining electrical connectivity
Data Source
AI summary
A wafer-level semiconductor package method comprising the step of providing a first wafer comprising a plurality of first dies each having a first, a second and a third electrodes formed on its front surface; attaching a second die having a fourth and a fifth electrodes formed on its front surface and a sixth electrode formed at its back surface onto each of the first die of the first wafer with the sixth electrode at the back surface of the second die attached and electrically connected to the second electrode at the front surface of the first die; and cutting the first wafer to singulate individual semiconductor packages.