Wafer Level Packaging Inductors with Air Gaps
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of inductors in semiconductor substrates faces inefficiencies due to impedance loss and capacitance coupling, leading to low quality factors, which existing processes attempt to address by creating air gaps through complex etching processes, but these processes are difficult to yield effectively.
Innovation Solution
A wafer level packaging structure is developed where inductors are formed on a low loss substrate with via holes connecting them to a wafer substrate, using pads to create air gaps and reduce impedance, thereby improving the inductor quality factor without the need for complex etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an inductor is integrated directly in a semiconductor substrate, then the production cost is reduced and integration is improved, but the quality factor is low due to impedance loss and capacitance coupling
Solution Approach 1:
The patent divides the substrate into two separate parts: a semiconductor substrate containing active components and a separate low-loss substrate containing the inductor. This segmentation allows each substrate to be optimized independently, with the low-loss substrate providing high quality factor inductors while the semiconductor substrate maintains its integration advantages.
Solution Approach 2:
The patent introduces pads as intermediary elements that connect the semiconductor substrate to the low-loss substrate. These pads create air gaps between the substrates, which act as mediators to reduce impedance loss and capacitance coupling, thereby improving the inductor quality factor while maintaining electrical connectivity.
2Reliability
If complex etching processes are used to create air gaps for improving inductor quality factor, then the quality factor is improved, but the manufacturing complexity increases and yield decreases
Solution Approach 1:
The patent performs preliminary actions by pre-forming pads on the semiconductor substrate before mounting the low-loss substrate. This preliminary pad formation simplifies the overall process, as the pads are already in place to create air gaps when the substrates are mounted together, eliminating the need for complex post-substrate etching processes.
Solution Approach 2:
Instead of creating air gaps by removing material (etching) from the substrate after inductor formation, the patent inverts the approach by using added structures (pads) to create air gaps during the mounting process. This inversion simplifies the manufacturing process and improves yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the quality factor of inductors by reducing impedance and capacitance coupling, improving the integration of high-performance active and passive components in wafer level packaging without damaging the device and increasing yield.
Implementation Method 1
By changing the current going through the coil, the coil will have a different magnetic flux
Implementation Method 2
depositing a dielectric material group in the cave, forming a dielectric layer on the dielectric material group, such that the parasitic effects and the energy loss of the substrate can be reduced by intervening the dielectric material group and the dielectric layer between the coil and the substrate
Data Source
AI summary
A wafer level packaging structure with inductors and manufacture method thereof. The method comprises providing a substrate, having several inductors, forming conductive lines and holes to connect the inductors and the wafer, and bonding the substrate and the wafer via bonding pads. Therefore, there are air gaps between the inductors and the wafer, thereby reducing the inductor's dispassion loss and increasing the inductor's quality factor. In addition, the inductors having a high quality factor can be integrated in the wafer containing active/passive components.