Wafer Level Packaging Multiple Bonding for MEMS
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Solution Overview
Problem
Current wafer level packaging (WLP) technologies face limitations in compatibility with fabrication processes, particularly with CMOS-based processes, and are inadequate for capping thick MEMS layers due to increased leakage pathways and disadvantageous bonding effects.
Innovation Solution
A method involving multiple bonding layers on MEMS and CMOS substrates, where a first bonding layer on the MEMS substrate and a second bonding layer on the CMOS substrate are physically bonded, followed by bonding a cap with a third bonding layer to hermetically seal the MEMS device, using processes like eutectic bonding and annealing, allowing for robust electrical and mechanical interfaces while optimizing materials for conductivity and bond strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If prior WLP solutions are used to cap MEMS layers, then packaging is achieved, but leakage pathways increase and bonding effects are disadvantageous
Solution Approach 1:
The patent divides the bonding process into multiple sequential bonding steps rather than a single bonding operation. First, a preliminary bonding is performed to attach the cap to the substrate, then a second bonding step creates additional bonding interfaces. This segmentation allows each bonding step to be optimized independently, reducing leakage pathways while improving overall bonding reliability for thick MEMS structures.
2Ease of manufacture
If certain bonding materials are used for packaging, then packaging is achieved, but compatibility with CMOS fabrication processes is lost
Solution Approach 1:
The patent modifies bonding material parameters and bonding process parameters to achieve compatibility with CMOS fabrication processes. By adjusting bonding temperatures, material compositions, and process conditions, the bonding materials can be integrated into existing CMOS workflows without compromising packaging effectiveness or device performance.
3Device complexity
If single bonding approach is used, then process simplicity is maintained, but inability to cap thick MEMS layers occurs
Solution Approach 1:
The patent employs multiple bonding steps with intermediate processing to accommodate thick MEMS layers. The first bonding step establishes initial attachment, allowing subsequent processing and alignment. The second bonding step completes the encapsulation. This segmented approach enables capping of thick structures that cannot be bonded in a single step, despite increased process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables robust electrical and mechanical interfaces, reduces leakage pathways, and allows for the capping of thick MEMS structures without adding process layers to the CMOS substrate, enhancing the compatibility with CMOS technology and providing a more reliable packaging scheme.
Implementation Method 1
using processes like eutectic bonding and annealing to create a robust electrical and mechanical interface
Implementation Method 2
using processes like eutectic bonding and annealing to create a robust electrical and mechanical interface
Data Source
AI summary
A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate.