Wafer Level Package Resin Cover for Chip Protection

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Solution Overview

Problem

Conventional wafer level packaging methods fail to provide comprehensive protection to semiconductor chips during handling and processing, as they do not fully encapsulate all sides of the chip, leading to susceptibility to damage and defects like chipping and cracking.

Innovation Solution

A method of manufacturing wafer level packages that completely encapsulates semiconductor chips, except for connectors and predetermined protruding portions, using a single resin covering step to cover all sides simultaneously, with the resin cover forming a continuous layer that exposes specific portions of the substrate while protecting the chip from damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional wafer level packaging is used, then the package size is reduced and manufacturing cost is lowered, but the semiconductor chip is not fully protected against damage during handling and processing

Engineering Contradiction:
Improveprotection against damageVSAvoidpackaging structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from conventional partial-side packaging to complete encapsulation by extending the resin cover to all six sides of the semiconductor chip (top, bottom, and four lateral sides). This dimensional expansion ensures comprehensive protection while maintaining the wafer-level packaging advantages of compact size and reduced complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The resin cover is applied to encapsulate the semiconductor chip before the dicing process that separates chips from the wafer. This preliminary encapsulation protects the chip during subsequent handling and processing operations, preventing damage before it can occur

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple depositing steps and multiple planarization steps are used, then the encapsulation is more complete, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveencapsulation completenessVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple protective functions into a single resin cover structure that simultaneously provides encapsulation for all six sides of the chip. This merged approach eliminates the need for separate depositing and planarization steps for each side, reducing manufacturing complexity while achieving complete encapsulation

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The resin cover serves multiple functions in a single component: it protects all sides of the semiconductor chip, provides structural support, enables complete encapsulation, and maintains planarity. This multi-functional design simplifies the manufacturing process by replacing multiple specialized steps with one universal solution

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8026601B2Encapsulated wafer level package with protection against damage and manufacturing method
Publication Date: 2011.09.27 SAMSUNG ELECTRONICS CO LTD
  • US8026601B2 patent drawing
  • US8026601B2 patent drawing
  • US8026601B2 patent drawing

AI summary

A packaged semiconductor device may include a substrate including at least one device layer and at least one connector arranged thereon, and a resin cover covering each side of the substrate, the resin cover on at least one side of the substrate including an opening exposing the connector and the resin cover on at least one other side of the substrate exposing a portion of the substrate.