WOLA Channelizer Architecture for Lower FFT Channelization Load

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Solution Overview

Problem

Fast-Fourier Transform (FFT)-based filter banks in multiple-channel FDMA receivers are computationally intensive and face difficulties as data rates increase, requiring more efficient channelization methods to manage signal processing in real-time.

Innovation Solution

A channelizer system incorporating a window buffer, weighting logic, time-folding logic, and discrete Fourier Transform (DFT) processes, along with a resource-conserving weighted overlap-add (WOLA) sub-band filter logic, to efficiently channelize and filter signals, reducing computational burden and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If FFT-based filter banks are used for channelization in multiple-channel FDMA receivers, then real-time signal processing capability is achieved, but computational complexity increases significantly

Engineering Contradiction:
Improvereal-time signal processing capabilityVSAvoidcomputational complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the signal processing task by dividing the wideband signal into multiple sub-bands using a filter bank structure. Each sub-band is processed independently through separate FFT operations, allowing parallel computation that reduces overall computational complexity while maintaining real-time processing capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies a window function to each input block before performing the FFT operation. This preliminary action of windowing reduces spectral leakage and improves frequency resolution, enabling more efficient signal separation and reducing the computational burden of subsequent processing stages.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the number of sub-bands increases to handle higher data rates, then communication capacity improves, but computational burden increases

Engineering Contradiction:
Improvecommunication capacityVSAvoidcomputational burden
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the total bandwidth into N sub-bands, where each sub-band can be independently processed. This segmentation allows the system to scale communication capacity by increasing N while maintaining manageable computational complexity through parallel processing of each sub-band.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a dynamic filter bank structure where the number of active sub-bands can be adjusted based on communication requirements. This allows the system to optimize the trade-off between communication capacity and computational burden by activating only the necessary number of sub-bands for current traffic conditions.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If a bank of parallel band-pass filters is used to recover multiple signals, then signal separation accuracy improves, but device complexity and resource usage increase

Engineering Contradiction:
Improvesignal separation accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces the traditional mechanical/electronic parallel filter bank with a digital signal processing approach using FFT-based filtering. This substitution maintains signal separation accuracy while significantly reducing device complexity and resource usage by leveraging efficient algorithms rather than physical filter components.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent transforms the time-domain filtering problem into the frequency domain using FFT operations. This dimensional change from time to frequency domain enables more efficient signal separation with reduced computational resources, as frequency-domain operations can be performed more efficiently than time-domain convolution for long filters.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11677484B2Resource conserving weighted overlap-add channelizer
Publication Date: 2023.06.13 HUGHES NETWORK SYST
  • US11677484B2 patent drawing
  • US11677484B2 patent drawing
  • US11677484B2 patent drawing

AI summary

Systems and methods are provided for channelizing. A first stage can provide a WOLA filter bank that can apply a single multiplier resource to perform window weighting for multiple WOLA filter banks. The first stage can remove mixer-based post FFT adjustment and provide equal functionality with a particular modification of tuning mixers at inputs of second stage FIR paths. The first stage can include a variable decimation, using a particular implementation of variable sample block size.