Write-Once Memory Coding for Phase Change Storage Latency
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Solution Overview
Problem
Phase change memory technologies face significant challenges in reducing average WRITE operation latency and improving programming throughput due to asymmetric command latency characteristics, where SET state transitions are much slower than RESET state transitions.
Innovation Solution
The implementation of WRITE-once memory (WOM) coding and overprovisioning strategies that prioritize RESET operations over SET operations, along with data shaping and compression techniques, to optimize memory sector usage and reduce overall latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If both RESET and SET operations are performed during WRITE operations, then complete data writing capability is achieved, but average WRITE latency increases due to the much slower SET operation
Solution Approach 1:
The memory is divided into multiple memory sectors, with each sector dedicated to storing a specific portion of the data. This segmentation allows the system to perform WRITE operations on only the necessary sectors rather than the entire memory, reducing the number of slow SET operations required while maintaining complete data writing capability.
Solution Approach 2:
The memory sectors are pre-initialized to a known state (all zeros) before WRITE operations begin. This preliminary action eliminates the need to perform SET operations to clear data between writes, allowing the system to rely primarily on fast RESET operations for subsequent writes, thereby reducing average WRITE latency.
2Quantity of substance
If memory sectors are fully utilized, then storage capacity is maximized, but programming throughput decreases due to frequent slow SET operations
Solution Approach 1:
Different memory sectors are assigned different data patterns based on their content characteristics. Sectors containing data with fewer transitions require fewer SET operations, while sectors with more transitions are handled differently. This local optimization allows the system to maximize storage capacity while maintaining high programming throughput by minimizing the total number of slow SET operations across all sectors.
3Loss of time
If overprovisioning is implemented with WOM coding, then average WRITE latency is reduced, but available storage capacity decreases
Solution Approach 1:
The system changes the operational parameters of the memory by implementing WOM coding schemes that transform the traditional read-write memory model into a write-once model. This parameter change allows the memory to exploit the asymmetric latency characteristics (fast RESET, slow SET) more effectively, reducing average WRITE latency at the cost of some storage capacity due to the overhead of the coding scheme.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces average WRITE operation latency and increases programming throughput by leveraging the faster RESET operations and optimizing memory sector utilization, achieving a programming speedup factor of approximately 3.46 with an overprovisioning factor of 2, while maintaining efficient data storage and retrieval.
Implementation Method 1
Phase change memory technology is a promising candidates for implementing storage-class memory
Data Source
AI summary
A memory with asymmetric command latency characteristics for WRITE operations utilizing WOM coding methodologies to reduce programming latency across a number of WRITE operations.