Word-Level Cache Coherence to Reduce False Sharing

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Solution Overview

Problem

Existing cache coherence schemes in computing systems incur inefficiencies and latency due to false sharing, where multiple cores attempting to modify different words within a cache line necessitate invalidating the entire cache line, leading to unnecessary ownership transfers and performance degradation.

Innovation Solution

Implementing a cache management system that tracks writability and readability at a word granularity, using a modified MESI cache coherence scheme with a 'P' state to indicate partial read/write permissions, and maintaining metadata to differentiate word states, allowing multiple cores to access cache lines with different permission states efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional cache coherence schemes are used to ensure data consistency across multiple cores, then cache line ownership must be transferred exclusively to one core at a time, but this causes false sharing and unnecessary invalidation overhead when multiple cores access different words within the same cache line

Engineering Contradiction:
Improvecache coherenceVSAvoidcache access efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the cache line permission management into word-granularity units. Instead of treating the entire cache line as a single ownership unit, each word within the cache line can have independent permission states (readable, writable, or invalid). This segmentation allows different cores to simultaneously access different words with appropriate permissions without requiring full cache line invalidation, thereby resolving the contradiction between maintaining coherence and avoiding false sharing overhead.

Inventive Principle:
Principle #1Segmentation

2Reliability

If entire cache lines are invalidated when multiple cores access different words, then data consistency is maintained, but performance degrades due to unnecessary ownership transfers and loss of cached data

Engineering Contradiction:
Improvedata consistencyVSAvoidcache ownership transfer latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by assigning different permission states to different words within the same cache line based on local access patterns. Each word can be marked as readable, writable, or invalid independently, allowing the system to maintain data consistency for accessed words while preserving cached data for other words that don't require invalidation. This eliminates the need for full cache line invalidation and reduces ownership transfer latency.

Inventive Principle:
Principle #3Local quality

3Productivity

If word-granularity permission tracking is implemented, then false sharing is reduced and simultaneous access is enabled, but metadata complexity and storage requirements increase

Engineering Contradiction:
Improveparallel access efficiencyVSAvoidmetadata structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements partial action by tracking permission states only at the word level when necessary, rather than maintaining full metadata for every possible word configuration. The metadata structure uses compact encoding where each word's permission state is tracked with minimal bits, and the system only actively manages permissions for words that are currently being accessed or modified. This approach enables parallel access efficiency while keeping metadata complexity manageable.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250363053A1System and method for cache management
Publication Date: 2025.11.27 SAMSUNG ELECTRONICS CO LTD
  • US20250363053A1 patent drawing
  • US20250363053A1 patent drawing
  • US20250363053A1 patent drawing

AI summary

A system and method for cache management. In some embodiments, a system includes: a lower-level cache; a first upper-level cache; and a second upper-level cache, the lower-level cache, the first upper-level cache, and the second upper-level cache being configured: to store first metadata of a cache line, in the first upper-level cache, the first metadata indicating that the cache line is in a partial state, the partial state indicating that at least two words in the cache line are in different permission states.