Word Line Booster Circuit for Flash Memory Voltage Stability
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Solution Overview
Problem
Conventional word line booster circuits in non-volatile memory devices experience significant voltage variations in power supply during read mode, leading to instability and high power consumption, which is undesirable for manufacturing low power high voltage memory devices.
Innovation Solution
A word line booster circuit is designed with multiple boosting capacitors and a charge-sharing transistor, along with a high voltage detector and clock control circuit, to generate a stable word line voltage with minimal power supply variation. This circuit includes a precharge circuit for initial charging, a discharge circuit to manage voltage, and a clock control circuit to enable charge sharing and disable capacitors as needed, ensuring a consistent output voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional word line booster circuit is used, then the circuit can generate word line voltage, but the power supply voltage variation is significant leading to instability and high power consumption
Solution Approach 1:
The word line booster circuit is segmented into multiple independent capacitor units (first capacitor C1, second capacitor C2, third capacitor C3) instead of using a single capacitor. Each capacitor can be independently controlled and charged, allowing the circuit to maintain stable output voltage while reducing overall power consumption through selective operation of individual capacitor segments.
Solution Approach 2:
The circuit employs dynamic control mechanisms including a clock control circuit that selectively enables or disables specific capacitors based on operating conditions, and a high voltage detector that monitors voltage levels and triggers appropriate charging operations. This dynamic adaptation allows the circuit to maintain stability while minimizing power consumption by activating only the necessary capacitor components.
2Reliability
If a conventional word line booster circuit is used, then the circuit can operate during read mode, but the power supply voltage variation causes instability
Solution Approach 1:
The circuit incorporates a high voltage detector that continuously monitors the word line voltage level and provides feedback to the clock control circuit. When the detected voltage falls below a predetermined threshold during read mode, the detector triggers a charging operation to replenish the capacitors. This feedback mechanism ensures stable operation by automatically correcting voltage variations without requiring continuous high power consumption.
Solution Approach 2:
The precharge circuit charges the capacitor units in advance before they are needed for word line boosting. By precharging capacitors C1, C2, and C3 to appropriate voltage levels beforehand, the circuit ensures that when read mode is activated, the capacitors are already prepared to maintain stable word line voltage, preventing instability caused by power supply variations.
3Stability of the object's composition
If multiple boosting capacitors are used to reduce power supply variation, then the voltage stability improves, but the circuit complexity increases
Solution Approach 1:
The clock control circuit serves multiple functions simultaneously: it controls the timing of capacitor charging operations, manages the selective enabling/disabling of individual capacitors, coordinates with the high voltage detector, and regulates the overall boosting operation. This multi-functionality reduces the need for separate dedicated circuits for each control task, thereby limiting the increase in overall circuit complexity despite using multiple capacitors.
Solution Approach 2:
The control functions for multiple capacitors are merged into a unified clock control circuit rather than using separate control circuits for each capacitor. The high voltage detector is also integrated to work in conjunction with the clock control circuit, creating a coordinated control system. This merging approach consolidates control logic and reduces the number of independent control paths, limiting the complexity increase that would otherwise result from having multiple capacitors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a stable word line voltage with reduced power consumption and improved short channel effects, enhancing the performance and reliability of non-volatile memory devices by maintaining a consistent output voltage across a wide range of power supply voltages.
Implementation Method 1
a first boosting capacitor C2_1 and a second boosting capacitor C2_2 connected in parallel each other to generate a boosting voltage
Implementation Method 2
a third boosting capacitor C2_3 operatively connected to the first boosting capacitor C2_1 and the second boosting capacitor C2_2 via a charge-sharing transistor
Data Source
AI summary
A nonvolatile memory device includes an array of rows and columns of memory cells and a plurality of word lines and bit lines associated with the memory cells. The memory device further includes a word line booster circuit coupled with the word lines for supplying a selected word line with a specific voltage as a drive voltage during an operation of the memory device. The word line booster circuit includes a first boosting capacitor and a second boosting capacitor connected in parallel to generate a boosting voltage and a first precharge circuit for precharging the first and second boosting capacitors. The word line booster circuit further includes a third boosting capacitor operatively connected to the first and second boosting capacitors via a charge-sharing transistor, the third boosting capacitor being connected to one end of a load resistor to generate an output signal at the other end of the load resistor when the charge sharing transistor is enabled.