Word Line Buffer Structure for Uniform Recrystallization

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Solution Overview

Problem

Semiconductor devices with buried-channel array transistors suffer from issues such as void generation and non-uniform recrystallization of grains during thermal treatment, affecting electrical performance due to diverse interfaces between work function layers and adjacent films.

Innovation Solution

A semiconductor device design featuring a word line structure with a buffer structure between work function layers, which contacts multiple surfaces of the doped-polysilicon layer, ensuring uniform interfaces and recrystallization, thereby mitigating void generation and maintaining electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a buried-channel array transistor (BCAT) device is used to improve short channel effect, then the short channel effect is improved, but void generation occurs and electrical performance is adversely affected

Engineering Contradiction:
Improveshort channel effectVSAvoidvoid generation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A buffer layer is introduced as an intermediary between the work function layer and the gate dielectric layer. This buffer layer mediates the interaction between these two layers, preventing direct contact that would otherwise lead to void formation at the interface during thermal treatment processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The buffer layer is deposited beforehand to cushion or absorb the stress and interface diversity issues that would otherwise occur between the work function layer and gate dielectric layer during subsequent thermal processing, preventing void formation before it can happen.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Stability of the object's composition

If thermal treatment is performed on the word line structure, then grain recrystallization occurs, but non-uniform recrystallization and void generation occur due to diverse interfaces

Engineering Contradiction:
Improvegrain recrystallizationVSAvoiduniformity of recrystallization
Core Design Contradiction:
Stability of the object's compositionVSManufacturing precision

Solution Approach 1:

The buffer layer provides a uniform and homogeneous interface between the work function layer and gate dielectric layer, ensuring consistent thermal and structural properties across the entire interface. This homogeneity enables uniform grain recrystallization during thermal treatment without the non-uniformity caused by diverse interfaces.

Inventive Principle:
Principle #33Homogeneity

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The buffer structure ensures uniform forces during thermal treatment, preventing void formation and maintaining the electrical performance of semiconductor devices by reducing interface diversity and promoting uniform recrystallization of grains.

Implementation Method 1

the extents of recrystallization of grains in the word function layer at the interfaces between the work function layer and its adjacent layers or films can be relatively uniform

Methodology Applied
Scientific EffectRecrystallization: Crystallisation

Implementation Method 2

performing a thermal treatment on the doped-polysilicon layer

Methodology Applied
Scientific EffectThermal treatment: Heat Treatment

Data Source

PatentUS20230301055A1Method of manufacturing semiconductor device having word line structure
Publication Date: 2023.09.21 NAN YA TECH
  • US20230301055A1 patent drawing
  • US20230301055A1 patent drawing
  • US20230301055A1 patent drawing

AI summary

A method of manufacturing a semiconductor device is provided. The method includes providing a semiconductor substrate having a trench. The method also includes forming a first buffer layer in the trench. The method further includes forming a doped-polysilicon layer on the first buffer layer in the trench. The method also includes performing a thermal treatment on the doped-polysilicon layer.