Word Line Defect Detection Circuit for Memory Devices
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Solution Overview
Problem
As memory devices are miniaturized, defects such as bridge defects between word lines become more likely, degrading the operation performance and requiring improved defect detection and management methods.
Innovation Solution
A memory device with a word line defect detection circuit that monitors the number of pulses in a pumping clock signal to identify defects, applying different voltages to word lines based on the detected defects to ensure reliable data storage and operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory device size is miniaturized to increase storage capacity, then storage density is improved, but defect occurrence rate increases due to narrowed wiring intervals
Solution Approach 1:
The patent applies preliminary action by performing word line defect detection before programming operations. The detection circuit checks for bridge defects in word lines using a detection voltage before actual data programming, allowing the system to identify defective word lines in advance and prevent power wastage on unprogrammable memory blocks, thus resolving the contradiction between miniaturization and reliability
2Productivity
If pumping voltage is increased to improve programming speed, then programming efficiency is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by using a detection voltage that is lower than the programming voltage to perform defect detection. The detection circuit uses a reduced voltage level (e.g., 1/4 to 1/2 of programming voltage) to check for word line defects, consuming less power during the detection phase while still identifying potential issues that would affect high-voltage programming operations
Solution Approach 2:
The system performs preliminary defect detection at lower voltages before committing to high-power programming operations. By detecting word line defects early using reduced pumping voltages, the system avoids wasting full programming power on defective blocks, thus improving overall energy efficiency while maintaining programming speed for good blocks
3Reliability
If bridge defect detection is performed to improve reliability, then data storage reliability is improved, but detection complexity increases
Solution Approach 1:
The patent applies self-service by using the memory device's own internal circuits to perform defect detection. The detection circuit utilizes existing word lines, bit lines, and charge pump circuits within the memory device itself, eliminating the need for external complex testing equipment. The memory device detects its own defects using integrated components, simplifying the overall system architecture while maintaining high detection capability
Solution Approach 2:
The detection circuit is designed with multi-functionality, using the same charge pump circuits and voltage generation mechanisms that serve both defect detection and actual programming operations. The word line defect detection circuit reuses existing memory device infrastructure, allowing a single integrated circuit to perform both detection and programming functions without requiring separate dedicated testing hardware
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances data storage reliability and operation performance by effectively detecting and addressing word line defects, preventing power wastage and ensuring accurate programming and erasing operations.
Implementation Method 1
a voltage generator configured to generate the pumping voltage responsive to the pumping clock signal
Data Source
AI summary
A memory device comprises a memory cell array including a first memory cell disposed on a substrate and a second memory cell above the first memory cell; a first word line connected to the first memory cell and a second word line connected to the second memory cell, the second word line disposed above the first word line; and a word line defect detection circuit configured to monitor a number of pulses of a pumping clock signal while applying a first voltage to the first word line to detect a defect of the first word line. The voltage generator is configured to apply a second voltage different from the first voltage to the second word line for programming the second memory cell when the number of pulses of the pumping clock signal is smaller than a reference value.