Word Line Read Scan Selection Using Defect Maps

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Solution Overview

Problem

Current memory systems inefficiently perform read scan operations by scanning all word lines or sub-blocks, leading to poor performance and resource wastage due to inadvertently skipping defective portions, which are known to contain errors.

Innovation Solution

A memory controller selectively performs read scans on identified defective portions of the memory sub-system using a defect map to optimize performance by restricting scans to only those portions known to be defective.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read scan operations are performed on all word lines or sub-blocks, then comprehensive defect detection is achieved, but system performance deteriorates and resources are wasted due to scanning non-defective portions

Engineering Contradiction:
Improvedefect detection completenessVSAvoidread scan efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the word lines into different groups based on defect characteristics. Instead of uniformly scanning all word lines, the system divides them into segments that require different scan strategies, allowing efficient scanning of non-defective segments while maintaining thorough scanning of defective segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different scan operations to different portions of word lines based on their defect status. Non-defective portions use standard scanning while defective portions use enhanced scanning, optimizing resource allocation according to local needs.

Inventive Principle:
Principle #3Local quality

2Reliability

If read scan operations are performed on all word lines or sub-blocks, then comprehensive defect detection is achieved, but latency increases due to unnecessary scanning of non-defective portions

Engineering Contradiction:
Improvedefect detection completenessVSAvoidread scan latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary classification of word lines into defective and non-defective groups before executing read scan operations. This preliminary action allows the system to skip scanning of non-defective portions, significantly reducing latency while maintaining comprehensive defect detection coverage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and identifies defective portions from the complete set of word lines using defect maps. By separating defective portions from non-defective ones, the system can selectively apply scanning only where needed, eliminating unnecessary time consumption on healthy portions.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If read scan operations are performed on all word lines or sub-blocks, then comprehensive defect detection is achieved, but resource consumption increases due to inadvertent skipping of defective portions

Engineering Contradiction:
Improvedefect detection completenessVSAvoidread scan resource wastage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent implements dynamic scan operation selection based on real-time defect map information. The scanning strategy adapts to the actual defect distribution, activating enhanced scanning only for defective portions and using minimal scanning for non-defective portions, thereby optimizing resource utilization.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses defect maps as feedback information to guide read scan operations. The defect detection results are fed back into the scanning decision process, allowing the system to continuously optimize which portions require scanning, reducing resource wastage while maintaining detection completeness.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250356934A1Defective word line based read scan
Publication Date: 2025.11.20 MICRON TECHNOLOGY INC
  • US20250356934A1 patent drawing
  • US20250356934A1 patent drawing
  • US20250356934A1 patent drawing

AI summary

Systems and methods for providing a memory sub-system controller that selectively adjusts which word line groups of a memory sub-system to scan during a read scan. The controller obtains a map that identifies a set of portions of a set of memory components having a reliability value that falls below a reliability threshold. The controller determines that a condition for performing a read scan for a plurality of portions of the set of memory components has been met. The controller, in response to determining that the condition has been met, selectively performs the read scan on a subset of the plurality of portions of the set of memory components based on the map that identifies the set of portions having the reliability value that falls below the reliability threshold.