Word Line Driver Layout for Low-Leakage DRAM Sub-Word Lines
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Solution Overview
Problem
As semiconductor memory capacity increases, the decreasing distance between word lines in dynamic random access memory (DRAM) leads to delays in voltage application, necessitating the division of word lines into sub-word lines driven by sub-word-line drivers to improve speed without increasing layout area.
Innovation Solution
The design includes a word line driver with sub-word-line drivers featuring keeping transistors with active areas that have a main portion and a protruding portion, allowing for increased channel length without expanding layout area, thereby reducing turn-off current and ensuring complete voltage control of word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the distance between word lines is decreased to increase memory capacity, then memory capacity increases, but voltage application delay increases
Solution Approach 1:
The word line driver is divided into multiple sub-word-line drivers (first SWD, second SWD, etc.), each driving a specific segment of word lines. This segmentation allows parallel voltage application to different word line segments, reducing the overall voltage application delay while maintaining high memory capacity through increased integration density.
2Loss of time
If sub-word-line drivers are used to improve voltage application speed, then voltage application delay decreases, but layout area increases
Solution Approach 1:
Adjacent sub-word-line drivers share common keeping transistors and active areas. Specifically, the second keeping transistor of the first SWD shares with the first keeping transistor of the second SWD, and they share a common active area with a protruding portion. This merging significantly reduces the total layout area required for multiple sub-word-line drivers while maintaining the speed benefits of segmented driving.
Solution Approach 2:
The shared keeping transistors and active areas serve multiple sub-word-line drivers simultaneously. The common active area with protruding portion functions as the source/drain region for multiple keeping transistors across different SWDs, enabling one structural element to perform multiple functions and reduce overall device footprint.
3Reliability
If keeping transistor channel length is increased to reduce turn-off current, then turn-off current decreases, but layout area increases
Solution Approach 1:
The active area includes a protruding portion that extends in a direction perpendicular to the main extension direction of the active area. This dimensional change allows the keeping transistor channel to achieve sufficient length for low turn-off current while utilizing vertical space rather than horizontal space, thereby maintaining compact layout area.
Solution Approach 2:
The protruding portion is nested within the active area structure, with the gate positioned above the main portion and the protruding portion extending from the side. This nested configuration allows the channel length to be effectively increased by utilizing the protruding portion's extension, achieving long channel benefits without proportionally increasing the overall active area footprint.
Data Source
AI summary
Provided are a word line driver and a memory apparatus. The word line driver comprises: a first keeping transistor and a second keeping transistor; an active area, including a main portion extending in a first direction and a protruding portion adjacent to a part of the main portion and located on one side of the main portion, and the protruding portion has a first source area and a second source area; a gate, located at least above a partial area, opposite to the protruding portion, of the main portion; and a first drain area and a second drain area separately located in the main portion on two opposite sides of the gate in the first direction; where the first drain area, the gate, and the first source area constitute the first keeping transistor, while the second drain area, the gate, and the second source area constitute the second keeping transistor.