Local Word Line Driver Circuit Using Complementary Phase Signals
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Solution Overview
Problem
Existing drivers for high density memory systems face challenges in efficiently generating local word line signals for local word lines, which are critical for operations such as read, program, and erase.
Innovation Solution
The proposed solution involves a driver comprising a phase driver and a complementary phase driver. The phase driver receives a first voltage signal and generates a second phase signal, while the complementary phase driver, with its first and second inverters, processes complementary phase signals to produce a second complementary phase signal. This configuration ensures that the driver can meet the driving requirements with a simple structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a driver is designed with a simple structure, then ease of manufacture is improved, but the ability to generate local word line signals for high density memory may be insufficient
Solution Approach 1:
The driver is divided into multiple independent modules: a first driver module for generating first phase signals, a second driver module for generating second phase signals, and a third driver module for generating third phase signals. Each module operates independently to drive different word line groups, allowing the complex driving function to be achieved through simple, modular components that are easier to manufacture and test.
2Reliability
If multiple voltage signals are used to drive different word line groups, then driving capability is improved, but device complexity increases
Solution Approach 1:
The driver modules are designed with multi-functionality to reduce overall device complexity. The first, second, and third driver modules can selectively drive different word line groups (first, second, and third groups of word lines) based on operational requirements. This universal design allows a single driver structure to handle multiple voltage signaling scenarios without requiring entirely separate circuits for each function.
Data Source
AI summary
The disclosed driver and memory include: a phase driver that receives a first voltage signal, configured to output a second phase signal according to the first phase signal and the first voltage signal; a complementary phase driver includes: a first inverter for generating a complementary inverted phase signal based on a first complementary phase signal, the first phase signal and the first complementary phase signal are mutually inverted; a second inverter for receiving an output signal of the first inverter and a second voltage signal, the voltage value of the second voltage signal is smaller than that of the first voltage signal, and the second inverter is configured to be based on the first complementary inverted phase signal, and the second voltage signal outputs a second complementary phase signal. The driver of the embodiment provides the second phase signal and the second complementary phase signal.


