Word Line Driving Device Minimizing RC Delay

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Solution Overview

Problem

In memory devices, the long wire length of word lines results in high parasitic resistance and capacitance, leading to increased RC delay and longer charging times for memory cells.

Innovation Solution

A word line driving device is designed with a conducting line of low equivalent resistance connected between the front and end nodes of the word line, allowing charging from both near and far sides, reducing RC delay and reading time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the word line is extended to cover more memory cells, then the coverage area increases, but the RC delay increases due to higher parasitic resistance and capacitance

Engineering Contradiction:
Improvecoverage areaVSAvoidRC delay
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The patent divides the word line into multiple segments by introducing intermediate word line drivers at different positions along the word line. Each segment is driven independently, allowing the long word line to be charged in parallel from multiple points rather than from a single end, thereby reducing the overall RC delay while maintaining extended coverage

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediate word line drivers as intermediary components between the memory controller and the distant memory cells. These intermediate drivers act as mediators that receive control signals and locally amplify/regenerate them, enabling effective driving of distant word line segments without being limited by the parasitic effects of the long interconnect

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the word line length is increased to access more memory cells, then the memory capacity increases, but the charging time increases due to higher parasitic resistance

Engineering Contradiction:
Improvememory capacityVSAvoidcharging time
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The word line is segmented into multiple zones with intermediate drivers positioned at strategic locations. Each segment can be charged simultaneously from its nearest driver, reducing the charging time from O(L) to O(L/n) where L is the total length and n is the number of segments, thereby enabling faster access to larger memory capacities

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate word line drivers are pre-positioned and pre-configured along the word line to optimize charging paths. This preliminary arrangement of driving points ensures that when memory access is required, the charging process can immediately begin from multiple points simultaneously, reducing the overall charging time for accessing expanded memory capacity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces RC delay and reading time in memory devices by utilizing a conducting line with low equivalent resistance to charge the word line from both sides, improving the efficiency of memory cell charging.

Implementation Method 1

a conducting line of low equivalent resistance connected between the front and end nodes of the word line, allowing charging from both near and far sides

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS11189336B2Word line driving device for minimizing RC delay
Publication Date: 2021.11.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11189336B2 patent drawing
  • US11189336B2 patent drawing
  • US11189336B2 patent drawing

AI summary

A word line driving device of a memory device is provided. The word line driving device of the memory device includes a word line, a word line driver, and a conducting line. The word line is disposed on a first metal layer. The word line is connected to a plurality of memory cells in a memory array. The word line driver is coupled to a first node of the word line. The conducting line is disposed on a second metal layer. The first node of the word line is coupled to a first node of the conducting line and a second node of the word line is coupled to a second node of the conducting line. The distance of the second metal layer with respect to a plurality of transistors in the memory device is greater than a distance of the first metal layer with respect to the plurality of transistors in the memory device.