Memory Word Line Dummy Structure for Uniform Etching
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Solution Overview
Problem
The conventional lithography process for memory devices faces challenges in maintaining consistent electrical properties due to the loading effect during the etching process, which causes contour inconsistencies between the center and end of the array region, leading to issues in memory cell formation.
Innovation Solution
Incorporating a dummy structure with a comb-shaped hard mask pattern between the array and winding regions, which includes a main part and extension parts, to reduce the loading effect by controlling the distance and pattern density, allowing for consistent contour formation of word lines and landing pads during the etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography process is used for patterning, then manufacturing process is simple, but loading effect causes contour inconsistency between center and end of array region
Solution Approach 1:
The patent applies preliminary action by forming dummy patterns in the array region and winding region before the main etching process. These dummy patterns are pre-positioned to balance the pattern density, ensuring that the etching process experiences uniform loading conditions across the array region from the beginning, thereby achieving consistent contours at both center and end regions.
Solution Approach 2:
The patent applies local quality by creating different pattern densities in different regions of the substrate. Specifically, dummy patterns are added to the array region and winding region to locally adjust the pattern density, making it consistent with the center region. This localized modification ensures uniform etching conditions without changing the overall device structure.
2Manufacturing precision
If double patterning is used to reduce critical dimension, then resolution is improved, but loading effect during etching causes electrical property issues
Solution Approach 1:
The patent applies local quality by adding dummy patterns specifically in the array region and winding region to locally balance the pattern density. This ensures that the etching process experiences uniform loading conditions across different regions, maintaining consistent electrical properties while preserving the high-resolution features achieved through double patterning.
Solution Approach 2:
The patent applies parameter changes by modifying the pattern density parameter in the array and winding regions through the addition of dummy patterns. This changes the loading conditions during etching from non-uniform to uniform, ensuring consistent etching rates and contour formation across the entire array region while maintaining the critical dimension control achieved through double patterning.
3Manufacturing precision
If dummy patterns are added to balance pattern density, then loading effect is reduced, but device structure becomes more complex
Solution Approach 1:
The patent applies preliminary action by forming dummy patterns in advance during the patterning process. These dummy patterns are created as part of the initial pattern formation step, allowing the etching process to proceed with uniform loading conditions. The dummy patterns are later removed or integrated into the final structure, achieving etching uniformity without permanent structural complexity.
Data Source
AI summary
Provided is a memory device, including: a substrate; a plurality of word lines, extending in a first direction, arranged in a second direction, disposed on the substrate; a dummy structure, adjacent to ends of the word lines, disposed on the substrate, wherein the dummy structure includes a main part that extends in the second direction; and a plurality of extension parts, extending in the first direction, connected to the main part, and interposed between the main part and the word lines.