3D NAND Word Line End Rounding for Leak Current Suppression

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Solution Overview

Problem

Existing nonvolatile semiconductor memory devices face challenges in maintaining high integration levels and preventing leak currents due to the concentration of electric fields at the ends of word lines.

Innovation Solution

The nonvolatile semiconductor memory device employs a configuration where the ends of the word line conductive layers in the periphery of the insulating layer are rounded, reducing electric field concentration and preventing leak currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the ends of word lines are made sharp to maintain small device dimensions, then integration level is improved, but electric field concentration occurs causing leak currents

Engineering Contradiction:
Improvedevice areaVSAvoidleak current suppression
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies curvature by rounding the ends of word lines instead of maintaining sharp edges. This geometric modification distributes the electric field more uniformly along the word line structure, preventing concentration at the terminal ends. The rounded configuration reduces unwanted charge accumulation and suppresses leak currents while preserving the compact device dimensions required for high integration levels.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Quantity of substance

If word lines are extended to cover entire memory regions, then memory capacity is improved, but electric field concentration at ends increases causing reliability issues

Engineering Contradiction:
Improvememory capacityVSAvoidthreshold voltage stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent modifies the terminal geometry of extended word lines by rounding their ends. This curvature prevents electric field concentration at the extremities of long word line structures, thereby stabilizing threshold voltages across the memory device. The rounded configuration allows word lines to extend across entire memory regions for high capacity while maintaining electrical stability and preventing leak currents.

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Productivity

If integration level is increased by reducing feature sizes, then device density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveintegration levelVSAvoidfeature size control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent changes the geometric parameter of word line ends from sharp/angular to rounded. This parameter modification allows for more tolerant manufacturing processes as the rounded configuration is less sensitive to minor variations in fabrication. The curvature provides a self-smoothing effect that compensates for manufacturing tolerances, enabling high integration levels with relaxed precision requirements compared to sharp-edged structures.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250038007A1Nonvolatile semiconductor memory device and method of manufacturing the same
Publication Date: 2025.01.30 KIOXIA CORP
  • US20250038007A1 patent drawing
  • US20250038007A1 patent drawing
  • US20250038007A1 patent drawing

AI summary

According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.