Word Line Read Circuit Using Selective Negative Kick Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Efficient and rapid reading of non-volatile memory cells, particularly those programmed to multiple data states, is challenging due to the complexity of applying various read voltages and the significant area occupied by circuits that apply these voltages, which complicates the design of word line control circuits.
Innovation Solution
The application of selective and varying negative kick voltages during read operations, tailored for different physical levels, blocks, and temperatures, allows for efficient read operations and reduced dimensions in word line control circuits, thereby optimizing die area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple read voltages are applied to read memory cells programmed to multiple data states, then more bits can be stored per memory cell, but the circuit complexity and area occupied by voltage application circuits increase significantly
Solution Approach 1:
The patent segments the word line control into multiple independent control circuits, each responsible for generating specific voltage combinations. This segmentation allows parallel generation of multiple read voltages without requiring a single complex voltage generation system, thereby reducing overall circuit complexity while supporting multi-state memory reading
Solution Approach 2:
Different word line control circuits are designed with different voltage generation capabilities tailored to specific reading scenarios. For example, some circuits generate only single read voltages while others generate multiple read voltages or include negative kick voltages, optimizing the voltage application complexity for each specific reading operation rather than providing all possible voltage combinations in every circuit
2Productivity
If circuits to apply various read voltages are designed to support multiple data states, then more bits can be read per memory cell, but the physical area occupied by these circuits increases
Solution Approach 1:
The word line control circuits are designed to perform multiple functions: generating standard read voltages, generating multiple read voltages for multi-state detection, and applying negative kick voltages to clear charge from unselected cells. This multi-functionality allows a single circuit design to handle various reading scenarios, improving reading efficiency without proportionally increasing circuit area
Solution Approach 2:
The control circuits dynamically select which voltage generation mode to operate in based on the reading requirements. The system can switch between single read voltage mode, multiple read voltages mode, and negative kick voltage mode, allowing the circuit area to be efficiently utilized only when needed for specific multi-state reading operations
3Measurement precision
If negative kick voltage is applied to clear charge from unselected memory cells, then read accuracy improves, but the complexity of voltage control increases
Solution Approach 1:
The negative kick voltage is applied periodically between the application of different read voltages during a read operation. This periodic application clears charge from unselected memory cells at appropriate intervals, preventing charge interference and improving read accuracy without requiring continuous complex voltage control
Solution Approach 2:
The negative kick voltage acts as an intermediary action between the application of different read voltages. It temporarily modifies the voltage state of unselected cells to prevent charge interference, then returns to normal operation, effectively mediating between multiple read voltage applications while maintaining controlled complexity
Data Source
AI summary
An apparatus includes control circuits configured to connect to a plurality of nonvolatile memory cells. The one or more control circuits are configured to apply read voltages on a plurality of word lines connected to the nonvolatile memory cells, ramp down from the read voltages to subsequent voltages such that voltage on a word line transitions through a voltage that is below a subsequent voltage by a negative kick voltage. The one or more control circuits are further configured to apply a first negative kick voltage to ramp down from a read voltage on a first word line and apply a second negative kick voltage to ramp down from the read voltage on a second word line.