Word Line Read Offset Control for Partially Programmed Blocks
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Solution Overview
Problem
Existing memory controllers face challenges in accurately tracking the last programmed portion of memory components, leading to improper application of read threshold voltage offsets and increased bit error rates (RBER) when reading data from boundary word lines.
Innovation Solution
A memory controller that selectively adjusts the boundary WL read level offset based on various conditions, using an adjustment factor to modify the read threshold voltage and reduce RBER, even when the indication of the last programmed portion is incorrect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller uses a fixed boundary WL read level offset, then the device complexity is reduced, but the read bit error rate increases due to improper offset application
Solution Approach 1:
The patent implements dynamic adjustment of the boundary WL read level offset based on real-time detection of the last programmed portion location. The controller adapts the offset value according to actual memory usage patterns, transitioning from a static to a dynamic offset mechanism that responds to changing memory states.
Solution Approach 2:
The system employs feedback mechanisms where the controller detects the actual location of the last programmed portion and uses this information to adjust the read level offset accordingly. This closed-loop approach ensures the offset is optimized based on actual memory usage rather than relying on predetermined fixed values.
2Reliability
If the memory controller tracks the last programmed portion accurately, then the read reliability improves, but the device complexity increases due to additional tracking mechanisms
Solution Approach 1:
The memory controller leverages existing memory structures and operations to track the last programmed portion. By utilizing the natural read operations and existing address tracking already present in the system, the controller achieves accurate tracking without adding separate dedicated tracking hardware or complex mechanisms.
3Reliability
If the memory controller applies a large read level offset to boundary WL, then the read reliability improves for last programmed portions, but the productivity decreases due to increased read time
Solution Approach 1:
The system dynamically changes the offset parameter based on the detected conditions. When the boundary WL contains the last programmed portion, a larger offset is applied to improve accuracy. When it does not, a smaller or zero offset is used to maintain faster read speeds. This adaptive parameter adjustment optimizes the trade-off between reliability and productivity.
Data Source
AI summary
A memory sub-system controller selectively adjusts read threshold voltages on certain word lines for partially written memory blocks of a memory sub-system. The controller generates a request to read a portion of a set of memory components. The controller, in response to determining that the portion corresponds to a partially programmed block (PB), selectively modifies a boundary word line (WL) read level offset, stored in a boundary WL offset table, by applying an adjustment factor to the boundary WL read level offset. The controller reads a first set of data from one or more inner WLs of the portion using a first read level offset retrieved from an inner WL offset table and reads a second set of data from a boundary WL of the portion using the selectively modified boundary WL read level offset.