Memory Word-Line Pass Voltage Staging for Faster Programming

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Solution Overview

Problem

The inefficiency of program operations in memory devices due to increased time required to increase program voltage as the difference between program and pass voltages increases, leading to reduced efficiency.

Innovation Solution

A memory device design that applies a first pass voltage to unselect word lines and a higher second pass voltage to select word lines during a pass voltage increase period, followed by applying a program voltage to the select word line, utilizing separate pass voltage regulators for each type.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single pass voltage is applied to all word lines before program operation, then the program voltage can be applied to the selected word line, but the time required to increase the program voltage increases and program operation efficiency is reduced

Engineering Contradiction:
Improveprogram operation efficiencyVSAvoidtime required to increase program voltage
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the word lines into two groups: selected word lines and unselected word lines. Different pass voltages are applied to each group during the program operation. The selected word lines receive a first pass voltage that is closer to the program voltage level, while unselected word lines receive a second pass voltage at a lower level. This segmentation allows the program voltage to be applied more quickly to the selected word lines without causing interference to unselected word lines, thereby reducing the time required to increase program voltage and improving program operation efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different voltage levels to different spatial locations (selected vs. unselected word lines) based on their functional requirements. The selected word lines require a higher pass voltage to prepare for program operation, while unselected word lines require a lower pass voltage to maintain stability and prevent interference. This local quality approach optimizes the voltage distribution across the memory array, enabling faster program voltage application to selected lines while maintaining system stability.

Inventive Principle:
Principle #3Local quality

2Reliability

If the difference between program voltage and pass voltage is increased to improve program operation, then the time required to increase program voltage increases

Engineering Contradiction:
Improveprogram operation reliabilityVSAvoidtime required to increase program voltage
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the voltage application strategy by creating two distinct pass voltage levels for selected and unselected word lines. The first pass voltage applied to selected word lines has a smaller difference from the program voltage, enabling faster voltage transition while maintaining program operation reliability. The second pass voltage applied to unselected word lines ensures adequate separation to prevent interference. This segmented approach simultaneously achieves reliable program operation and reduced voltage increase time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the pass voltage parameter dynamically based on the selection state of each word line. Instead of using a fixed pass voltage for all word lines, the system adjusts the pass voltage level according to whether the word line is selected or unselected. This parameter change enables optimized voltage transitions for selected lines (faster increase) while maintaining adequate voltage margins for unselected lines (reliability preservation).

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250329362A1Memory device and method of applying pass voltage
Publication Date: 2025.10.23 SK HYNIX INC
  • US20250329362A1 patent drawing
  • US20250329362A1 patent drawing
  • US20250329362A1 patent drawing

AI summary

The present technology relates to a memory device. The memory device according to the present technology may include a memory cell array including memory cells, the memory cells connected through a plurality of word lines, a peripheral circuit configured to apply pass voltages to the plurality of word lines and, after applying the pass voltages to the plurality of word lines, configured to apply a program voltage to a select word line, selected among the plurality of word lines, in a period in which a program operation is performed, wherein the pass voltages include a first pass voltage and a second pass voltage, and a control logic configured to control the peripheral circuit so that the second pass voltage is applied to the select word line and the first pass voltage is applied to unselect word lines among the plurality of word lines, which are not selected.