Word Line Pass Voltage Tuning for Memory Programming Speed Variation

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Solution Overview

Problem

Existing memory devices face challenges in compensating for variations in program speed of memory cells, leading to inefficiencies in programming operations.

Innovation Solution

A memory device and method that includes a test program operation to determine the program speed of memory cells, followed by adjusting the pass voltage levels and application time points based on the number of test operations performed, to optimize programming efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fixed pass voltage is used for all memory cells, then the control logic is simple, but memory cells with different program speeds cannot be efficiently programmed

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidcontrol logic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements dynamic pass voltage adjustment based on measured program speed. The control logic measures the program speed of memory cells and dynamically adjusts the pass voltage accordingly, transitioning from a static fixed voltage to a dynamic adaptive voltage that optimizes programming efficiency for each cell's characteristics.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent introduces a feedback mechanism where the control logic measures the actual program speed of memory cells and uses this measurement to adjust the pass voltage. This closed-loop feedback system allows the control logic to adapt to varying program speeds and optimize programming operations based on real performance data.

Inventive Principle:
Principle #23Feedback

2Reliability

If multiple pass voltages are applied to compensate for program speed variations, then programming reliability improves, but the number of operation steps increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidoperation sequence complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs a preliminary measurement of program speed before the actual programming operation. By measuring the program speed in advance and using this information to determine the appropriate pass voltage, the system prepares the optimal programming parameters beforehand, ensuring reliable programming without requiring multiple trial operations.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the pass voltage is adjusted for each word line based on test results, then programming precision improves, but the test operation time increases

Engineering Contradiction:
Improveprogram speed compensation precisionVSAvoidtest operation time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent segments the memory array into word lines and performs program speed measurements and pass voltage adjustments at the word line level. This segmentation allows independent optimization of each word line's programming parameters while maintaining manageable test scope and time, rather than requiring system-wide measurements.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250356921A1Memory device and method of operating the memory device
Publication Date: 2025.11.20 SK HYNIX INC
  • US20250356921A1 patent drawing
  • US20250356921A1 patent drawing
  • US20250356921A1 patent drawing

AI summary

Provided herein is a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells connected to a plurality of word lines, respectively, a peripheral circuit configured to perform a test program operation and a pass bit detection operation of measuring a program speed of memory cells connected to a selected word line among the plurality of word lines during a test operation, and control logic configured to control the peripheral circuit to perform the test operation, and set a potential of a pass voltage to be used in a program operation, or a time point at which the pass voltage is to be applied, based on a number of times the test program operation is performed.