Word Line Contact Polysilicon Separation to Prevent Bridging
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Solution Overview
Problem
The challenge in non-volatile memory devices, such as flash memory, is the difficulty in selectively removing polysilicon material between tightly packed polysilicon lines in the strap regions, which can lead to residue and electrical shorts due to decreasing spacing between lines with each technology generation.
Innovation Solution
A patterning process involving photolithography and etching operations is employed to remove excess material between polysilicon lines in the strap regions, using a hard mask stack and selective etching processes to minimize residue and ensure adequate spacing, thereby preventing bridging and electrical shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If polysilicon lines are tightly packed to increase memory device density, then storage capacity is improved, but residue and electrical shorts occur due to bridging between adjacent lines
Solution Approach 1:
The patent applies segmentation by dividing the continuous polysilicon layer into discrete, separated lines through controlled removal processes. The divot formation and selective etching create physical separations between adjacent polysilicon lines, preventing bridging while maintaining high density. This is achieved through multiple patterning steps that systematically segment the polysilicon structure.
Solution Approach 2:
The patent employs preliminary action by forming divots and applying hard masks before final polysilicon removal. These preparatory structures are created in advance to guide subsequent etching processes, ensuring precise separation of polysilicon lines. The preliminary divot formation creates predetermined separation zones that prevent residue accumulation during later processing steps.
2Loss of substance
If conventional photolithography and etching processes are used to remove excess material, then material removal is achieved, but significant residue remains between polysilicon lines
Solution Approach 1:
The removal process is segmented into multiple discrete steps: divot formation, hard mask deposition, selective etching, and iterative refinement. Each step targets specific regions and removes material in a controlled manner, preventing residue accumulation. The segmentation of the removal process allows for precise control over what material is removed and what remains as intentional structure.
Solution Approach 2:
The patent introduces vertical dimensionality through divot formation and multi-layer hard mask structures. By creating depth variations (divots) and stacking mask layers, the process achieves precise lateral control of material removal. This dimensional approach allows etching to proceed selectively in specific areas while protecting adjacent regions, dramatically reducing residue.
3Reliability
If multiple patterning steps are employed to achieve precise separations, then bridging is prevented, but process complexity increases
Solution Approach 1:
The patent merges multiple functions into integrated process steps. The hard mask layer serves both as a protective barrier during etching and as a defining structure for the final pattern. Divot formation combines structural preparation with process guidance functionality. This merging reduces the number of separate process modules needed while achieving the same reliability outcomes.
Solution Approach 2:
The hard mask structure performs multiple functions: protecting underlying polysilicon during etching, defining the final pattern geometry, and serving as a sacrificial element that is selectively removed. The divot structures similarly serve both as physical separation elements and as process control features. This multi-functionality reduces overall process complexity by eliminating the need for separate dedicated steps for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process effectively reduces or eliminates residue between polysilicon lines, maintaining the integrity of memory cell structures and preventing electrical shorts, enhancing the reliability and density of memory devices.
Implementation Method 1
A patterning process involving photolithography and etching operations is employed to remove excess material between polysilicon lines
Implementation Method 2
etching, from the polysilicon layer, the mask layer with a dry etching process to remove a portion of the mask layer
Implementation Method 3
etching, from the polysilicon layer, unremoved portions of the mask layer with a wet etching process
Data Source
AI summary
The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot; performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.