Memory Word Line Pre-Charging to Reduce Neighboring Interference

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Solution Overview

Problem

Existing semiconductor memory technologies face issues with neighboring word line interference (NWI) during programming, leading to reduced data reliability and increased resource utilization.

Innovation Solution

A method and apparatus that involve pre-charging operations with varying pre-charge voltages applied to neighboring word lines during programming, including a first elevated voltage to an adjacent word line and a second voltage to the opposite side, followed by a programming pulse, to minimize interference and improve data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single pre-charge voltage is applied to all unselected word lines, then the pre-charging operation is simple to implement, but neighboring word line interference occurs and erase state upper tails are degraded

Engineering Contradiction:
Improvepre-charging operation complexityVSAvoiderase state upper tails
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent applies different pre-charge voltages to different groups of unselected word lines based on their proximity to the selected word line. Specifically, a first pre-charge voltage is applied to first unselected word lines (immediately adjacent to the selected word line) while a second pre-charge voltage is applied to second unselected word lines (further from the selected word line). This local differentiation reduces neighboring word line interference and prevents degradation of erase state upper tails while maintaining manageable operational complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If multiple pre-charge voltages are applied to different unselected word lines, then neighboring word line interference is reduced and data reliability is improved, but the control circuitry complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidcontrol circuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control circuitry is designed to manage multiple pre-charge voltage levels by implementing group-based voltage assignment. The circuitry identifies which unselected word lines are immediately adjacent to the selected word line and applies the first pre-charge voltage to them, while applying the second pre-charge voltage to other unselected word lines. This structured approach improves data reliability by reducing neighboring word line interference while keeping the control logic organized and manageable.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The unselected word lines are segmented into different groups based on their distance from the selected word line. The first group consists of word lines immediately adjacent to the selected word line, receiving the first pre-charge voltage, while the second group consists of other unselected word lines receiving the second pre-charge voltage. This segmentation allows the control circuitry to handle complexity in a modular fashion, improving data reliability without overwhelming control complexity.

Inventive Principle:
Principle #1Segmentation

3Productivity

If standard pre-charging is used without differentiated voltages, then resource utilization is high, but neighboring word line interference degrades programming accuracy

Engineering Contradiction:
Improveresource utilizationVSAvoidprogramming accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements differentiated pre-charge voltages where the first pre-charge voltage is applied to unselected word lines immediately adjacent to the selected word line, and the second pre-charge voltage is applied to other unselected word lines. This local differentiation reduces neighboring word line interference and improves programming accuracy by preventing interference-induced threshold voltage shifts, while the pre-charging operation itself maintains efficient resource utilization.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12512168B2Programming techniques to improve erase state upper tails in a memory device
Publication Date: 2025.12.30 SANDISK TECHNOLOGIES LLC
  • US12512168B2 patent drawing
  • US12512168B2 patent drawing
  • US12512168B2 patent drawing

AI summary

The memory device includes a memory block with an array of memory cells that are arranged in a plurality of word lines. The memory device also includes circuitry that programs the memory cells of a selected word line of the plurality of word lines in a plurality of program loops. In at least one of the program loops, the circuitry is configured to, in a pre-charging operation, apply a first pre-charge voltage to a plurality of unselected word lines of the plurality of word lines and apply a second pre-charge voltage to a first neighboring word line that is immediately adjacent to and on one side of the selected word line. The first neighboring word line contains memory cells that have already been programmed to their final data states.