Word Line Voltage Control for Faster Successive Memory Reads

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Solution Overview

Problem

Existing non-volatile memory technologies face challenges in efficiently managing current consumption and read time during successive reads, particularly in multi-level cell devices, leading to uncorrectable errors and reduced performance.

Innovation Solution

The implementation of a memory apparatus and method that adjusts the voltage applied to word lines during read operations based on subsequent read operations and control gate ready voltages, optimizing voltage application at the end or beginning of read operations to improve efficiency and reduce errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If voltage is applied to word lines during read operations, then read operation can be performed, but current consumption increases

Engineering Contradiction:
Improveread operation performanceVSAvoidcurrent consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The control means determines whether a subsequent read operation is scheduled before completing the current read operation. Based on this preliminary determination, it adjusts the voltage discharge timing - either discharging at the normal end of the current read or waiting until the beginning of the subsequent read, thereby optimizing current consumption while maintaining read performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The voltage discharge timing is made dynamic rather than fixed. The control means adaptively adjusts when to discharge the word line voltage based on the scheduling of subsequent read operations, allowing the system to optimize between current consumption and read performance in real-time

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If voltage is discharged at the end of read operation, then current consumption is reduced, but read time increases

Engineering Contradiction:
Improvecurrent consumptionVSAvoidread time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

By determining in advance whether a subsequent read is scheduled, the system can proactively decide to extend voltage retention beyond the nominal end of the current read operation, avoiding the need to recharge voltage and thus reducing overall read time while maintaining current efficiency

Inventive Principle:
Principle #10Preliminary action

3Productivity

If voltage is maintained for successive reads within predetermined time, then read time performance improves, but current consumption increases

Engineering Contradiction:
Improveread time performanceVSAvoidcurrent consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The control means uses feedback from the read scheduling information to make intelligent decisions about voltage management. By knowing whether subsequent reads are scheduled within a predetermined time window, the system adjusts its voltage discharge strategy accordingly, optimizing both performance and power consumption

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes the voltage discharge timing parameter based on the timing characteristics of subsequent read operations. When reads are scheduled within a predetermined time window, the voltage discharge is delayed or skipped, effectively changing the operational parameters to match the workload characteristics

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12505889B2Methods to improve current consumption and read time in successive reads
Publication Date: 2025.12.23 SANDISK TECHNOLOGIES LLC
  • US12505889B2 patent drawing
  • US12505889B2 patent drawing
  • US12505889B2 patent drawing

AI summary

A memory apparatus includes memory cells each connected to word lines and configured to store a threshold voltage corresponding to data states. The memory apparatus also includes a control means configured to apply at least one read voltage associated with one of the data states to ones of the word lines connected to the memory cells being read in one read operation. The control means is also configured to adjust a voltage applied to the ones of the word lines during at least one of an end of the one read operation or a beginning of a subsequent read operation of the memory cells based on at least one of the subsequent read operation following the one read operation within a predetermined time or a control gate ready voltage of the ones of the word lines targeted following the one read operation.