Memory Word Line Refresh for Write Recovery Speed
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices face challenges in achieving high-speed write operations while ensuring sufficient write recovery time to prevent errors, as longer write recovery times can lead to slower performance and increased error rates.
Innovation Solution
The memory device activates and pre-charges a word line accessed during a previous write operation, along with a corresponding word line during an active operation, to enhance write recovery and prevent errors, allowing for efficient operation of memory banks by activating multiple word lines simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write recovery time is extended to prevent errors, then reliability is improved, but write operation speed deteriorates
Solution Approach 1:
The patent applies preliminary action by activating and pre-charging the word line that was accessed during a previous write operation before it is needed for the next operation. This proactive preparation ensures that when the write operation needs to access this word line again, the recovery time requirements are already satisfied, preventing errors without extending the overall write recovery time parameter. The word line controller monitors previous write operations and schedules word line activations in advance to meet recovery time requirements.
2Productivity
If write operation speed is increased, then productivity is improved, but write recovery time becomes insufficient causing errors
Solution Approach 1:
The patent implements feedback by having the word line controller track and monitor the timing of previous write operations and the subsequent activation status of accessed word lines. This feedback mechanism allows the controller to identify when a word line needs to be re-activated to satisfy recovery time requirements, enabling the system to maintain high write operation throughput while ensuring that each word line receives adequate recovery time between operations, thus preventing write errors.
3Productivity
If multiple word lines are activated simultaneously in one memory bank, then device efficiency is improved, but complexity of control increases
Solution Approach 1:
The patent applies segmentation by dividing the memory bank into multiple independent memory blocks, each with its own word line controller. This segmentation allows each controller to manage a subset of word lines independently, simplifying the control logic for each unit while enabling parallel operation across multiple blocks. The overall system achieves high efficiency through coordinated operation of these segmented units, with each unit maintaining manageable complexity through localized control.
Data Source
AI summary
A memory device includes a memory bank including a plurality of word lines, and a word line controller capable of activating a first word line, which is accessed during a previous write operation, among the plurality of word lines, while activating a second word line corresponding to an input address among the plurality of word lines, during an active operation.