Semiconductor Word Line Selection Circuit Grouping

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Solution Overview

Problem

The increasing number of word lines in semiconductor devices, due to higher integration of memory cells, places a larger load on word drivers, restricting further reduction in circuit scale and making it difficult to efficiently select and drive word lines, especially with limited repeating pitch and wiring layers.

Innovation Solution

The semiconductor device incorporates a plurality of circuit sets with drive circuits and selection circuits, where selection circuits supply active potential to word lines through level shifters and inverters, allowing for the classification of word lines into groups and reducing the size of word line selection circuits, enabling easier selection and control of main word lines on both sides of the drivers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of word lines is increased to achieve higher integration of memory cells, then the storage capacity and integration density are improved, but the load on word drivers increases and the circuit scale expands

Engineering Contradiction:
Improvenumber of memory cellsVSAvoidcircuit scale
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent divides word lines into multiple groups (first word lines and second word lines) with different selection mechanisms. First word lines are selected by first word drivers, while second word lines are selected by second word drivers. This segmentation allows the system to handle a larger total number of word lines by distributing the selection burden across multiple driver circuits, thereby resolving the contradiction between increasing storage capacity and controlling circuit complexity.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If the repeating pitch is reduced to increase integration density, then the circuit scale is reduced, but the space available for word drivers is limited

Engineering Contradiction:
Improveintegration densityVSAvoidspace for word drivers
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent introduces a hierarchical structure with multiple levels of word line selection. First word lines are selected at a coarser granularity by first word drivers, while second word lines within each group are selected by second word drivers. This multi-dimensional approach to selection allows the circuit to accommodate more word lines within the same physical area by utilizing the dimensional space created through hierarchical grouping, effectively resolving the space constraint imposed by reduced repeating pitch.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If two word drivers are juxtaposed to pull out word lines from one side, then word line selection is enabled, but further reduction of circuit scale is restricted

Engineering Contradiction:
Improveword line selectionVSAvoidcircuit scale
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments word line selection into two independent functions: first word drivers handle first word lines, and second word drivers handle second word lines. This segmentation allows each driver to be simpler and smaller in size, as they only need to manage a subset of word lines rather than all word lines. By distributing the selection function across multiple smaller driver units, the overall circuit scale is reduced while maintaining effective word line selection capability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9053759B2Semiconductor device having plural selection lines
Publication Date: 2015.06.09 LONGITUDE LICENSING LTD
  • US9053759B2 patent drawing
  • US9053759B2 patent drawing
  • US9053759B2 patent drawing

AI summary

The semiconductor device includes a plurality of word lines classified into a plurality of groups and a selection circuit for selecting a word line according to an address. The selection circuit has a level shifter arranged for each of the groups. The address includes a first address for selecting any of the groups and a second address for selecting a word line in the selected group. The selection circuit selects a word line by allowing supply of active potential for word line by the level shifter of a group selected by the first address and further allowing supply of the active potential to the word line selected by the second address out of a plurality of word lines belonging to the selected group.