Word-Line Driver Layout Using Shared Holding Transistors
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The layout area of current word-line drive circuits is large, limiting integration in memory devices due to the need for multiple sub word-line drivers, which occupy significant space.
Innovation Solution
A word-line drive circuit design that includes at least two sub word-line drivers (SWDs) sharing a holding transistor, with each SWD connected to a main word line and two sub word lines, allowing one sub word line to be driven while the other is kept unselected, thereby reducing the layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple sub word-line drivers are used to drive different sub word lines, then the word-line driving capability is improved, but the layout area increases
Solution Approach 1:
The patent merges the holding transistor functions of multiple SWDs into a single shared holding transistor. Specifically, the first SWD and second SWD both share the first holding transistor, allowing one transistor to control multiple sub word lines (WL0 and WL1) instead of requiring separate holding transistors for each SWD. This reduces the total number of transistors and decreases the layout area while maintaining the capability to drive multiple sub word lines independently.
Solution Approach 2:
The shared holding transistor serves multiple functions: it acts as the holding transistor for both the first SWD and second SWD simultaneously, and it controls both sub word lines WL0 and WL1. This multi-functionality allows the circuit to maintain comprehensive sub word line control capability while using fewer components, thereby reducing the overall layout area of the word-line drive circuit.
2Area of stationary object
If the number of holding transistors is reduced by sharing, then the layout area is reduced, but the circuit complexity increases
Solution Approach 1:
The patent segments the control functions by introducing separate drive signals (first drive signal for WL0, second drive signal for WL1) that independently control each sub word line through the shared holding transistor. This segmentation allows the shared holding transistor to be controlled in a structured manner, where each sub word line has its own control path, thereby managing the circuit complexity while achieving area reduction through transistor sharing.
Data Source
AI summary
A word-line drive circuit, a word-line driver and a storage device are provided. The word-line drive circuit includes at least two SWDs. Each SWD is connected to an MWL for providing an enable signal and a sub word line. The SWD includes a holding transistor. A first end and a second end of the holding transistor are respectively connected to different sub word lines, and a gate receives a second drive signal. The SWD is configured to provide a first drive signal to a selected sub word line in response to the first drive signal and the enable signal, the selected sub word line being a sub word line connected to the first end or second end of the holding transistor, and to conduct the first end and the second end of the holding transistor in response to the first drive signal, the enable signal and the second drive signal.