3D NAND Word Line Architecture for Stepped Contact Region Optimization
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Solution Overview
Problem
The increasing number of word line layers in three-dimensional (3D) flash memory devices poses challenges in connecting them to a metal layer, leading to difficulties in arranging contacts in stepped or terraced regions, which becomes progressively complex as the number of wiring layers increases, necessitating a more efficient non-volatile memory apparatus design.
Innovation Solution
The design involves a memory apparatus with a stack of word lines divided into two sets, each defining a stepped contact region on opposite sides of a device region, where the first set of word lines terminates at the second stepped contact region, reducing the number of via contacts and interconnects required, thereby minimizing the area and complexity of the stepped contact regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of word line layers is increased to achieve higher storage density, then storage capacity is improved, but the complexity of arranging contacts in stepped or terraced regions increases
Solution Approach 1:
The patent divides the word line layers into two separate sets (first set and second set), each forming its own stepped contact region. This segmentation allows the contacts to be arranged in two distinct areas rather than one large complex region, reducing the overall complexity of contact arrangement while maintaining high storage density through multiple word line layers
2Quantity of substance
If more word line layers are stacked to increase memory density, then storage density is improved, but the area required for stepped contact regions increases
Solution Approach 1:
The patent utilizes vertical stacking of word line layers to increase storage density without proportionally increasing the planar area of stepped contact regions. By arranging contacts in two sets on opposite sides and extending word lines vertically through multiple layers, the design achieves high storage density while constraining the contact region area
3Quantity of substance
If the number of wiring levels is increased to achieve ultra high density, then storage density is improved, but the difficulty of arranging contacts becomes progressively greater
Solution Approach 1:
The patent segments the contact arrangement into two separate stepped contact regions (first and second) located on opposite sides of the device region. This segmentation simplifies the manufacturing process by dividing the complex contact arrangement task into two more manageable regions, making it easier to manufacture ultra high density memory devices with multiple wiring levels
Data Source
AI summary
A non-volatile memory apparatus is provided and includes a substrate having a major surface extending longitudinally. A stack of first and second sets of word lines and insulating layers extends along and over the major surface longitudinally and alternating with and overlying one another vertically to define a device region. The first and second sets of word lines each respectively extends longitudinally beyond a first and second side of the device region a decreasing longitudinal distance from the device region as a vertical distance from the major surface increases to define first and second stepped contact regions. Word line contacts extend vertically in the first and second stepped contact regions. The second set of word lines in the first stepped contact region do not contact the word line contacts and the first set of word lines in the second stepped contact region do not contact the word line contacts.