Word Line Switching Layout for Lower Memory Cell Interference
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Solution Overview
Problem
Interference between memory cells in nonvolatile memory devices occurs due to the narrowing of distances between cells, and there is a trade-off between data processing speed and the need for continuous power supply in volatile memory devices.
Innovation Solution
A semiconductor device with a memory cell array and control circuit that unidirectionally drives unselected word lines and bidirectionally drives selected word lines based on address signals, using switches and line driving circuits to manage the driving directions of drain selection lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory cells are formed by cutting one hole to deploy more cells in the same area, then storage capacity is improved, but interference between memory cells increases due to narrowed distances
Solution Approach 1:
The patent applies local quality by differentiating the driving direction control for different memory strings. Specifically, when a first memory string is selected, the first drain selection line is driven in a first direction while the second drain selection line is driven in a second direction. When a second memory string is selected, the driving directions are reversed. This localized differentiation in driving direction reduces interference between adjacent memory cells while maintaining high storage capacity.
2Productivity
If volatile memory device is used to achieve fast data processing speed, then productivity is improved, but the need for continuous power supply increases
Solution Approach 1:
The patent extracts the bidirectional driving capability from the word line selection mechanism and applies it specifically to the unselected word lines. By controlling the driving direction of unselected word lines to be opposite to that of selected word lines, the patent reduces interference without requiring continuous power supply, thus achieving fast data processing speed with lower energy consumption.
Data Source
AI summary
A semiconductor device may include a memory cell array including a first memory string that is connected to a first drain selection line and a second memory string that is connected to a second drain selection line, a control circuit configured to generate a first switch control signal and a second switch control signal based on an address signal, a first switch disposed in a direction corresponding to the first drain selection line and configured to connect a global word line with a local word line or disconnect the global word line from the local word line based on the first switch control signal, and a second switch disposed in a direction corresponding to the second drain selection line and configured to connect the global word line with the local word line or disconnect the global word line from the local word line based on the second switch control signal.