Word-Line Read Voltage Correction for NAND Threshold Drift

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Solution Overview

Problem

Current memory systems face challenges in maintaining data read reliability due to changes in threshold voltage distributions of memory cell transistors caused by stress and wear, leading to increased fail bit counts and error corrections during read operations.

Innovation Solution

A memory system that includes a semiconductor storage device and a memory controller, which performs a patrol operation to correct read voltages by calculating correction values based on fail bit counts and fail ratios between adjacent states, and uses a soft determination decoding process with LLR tables to adjust read voltages for accurate error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read voltages are used without correction in degraded memory cells, then read operations are simple and fast, but fail bit counts increase and data reliability deteriorates

Engineering Contradiction:
Improvedata read reliabilityVSAvoidread voltage correction complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs patrol operations to detect fail bits and calculate correction values before normal read operations occur. By pre-calculating correction values based on threshold voltage distribution analysis during patrol mode, the system prepares compensation data in advance, ensuring reliable reads without adding complex real-time correction mechanisms.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where correction values derived from patrol operation results are fed back to adjust read voltages in subsequent operations. The memory controller continuously monitors fail bit counts and threshold voltage distributions, then dynamically adjusts read voltages using stored correction values, creating a closed-loop system that maintains reliability while managing complexity.

Inventive Principle:
Principle #23Feedback

2Reliability

If patrol operations are performed frequently to correct read voltages, then data reliability is maintained, but operation time and system productivity decrease

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidoperation throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs patrol operations periodically rather than continuously, balancing reliability maintenance with productivity preservation. Patrol operations are executed at predetermined intervals to detect threshold voltage drift and update correction values, ensuring data retention reliability while minimizing interference with normal read/write operations and maintaining high operation throughput.

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If correction values are updated based on detailed threshold voltage analysis, then read accuracy is improved, but processing time and computational complexity increase

Engineering Contradiction:
Improveread voltage accuracyVSAvoidcorrection calculation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system applies local quality by calculating correction values specifically for word lines exhibiting threshold voltage shifts, rather than uniformly processing all word lines. The patrol operation identifies affected word lines and computes correction values only for those regions, improving read voltage accuracy where needed while minimizing unnecessary processing time for already-healthy memory regions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11099931B2Memory system
Publication Date: 2021.08.24 KIOXIA CORP
  • US11099931B2 patent drawing
  • US11099931B2 patent drawing
  • US11099931B2 patent drawing

AI summary

A memory system includes a semiconductor storage device and a memory controller including a storage circuit that stores correction value for read voltages in association with the word line, and a control circuit that reads data from the memory cells, performs a correction operation on the read data to determine a number of error bits therein, determines the correction value for each read voltage based on the number of error bits and a ratio of a lower tail fail bit count and an upper tail fail bit count, and stores the correction values for the read voltages in the storage circuit. The lower tail fail bit count represents the number of memory cells in a first state having threshold voltages of an adjacent state, and the upper tail fail bit count represents the number of memory cells in the adjacent state having threshold voltages of the first state.