Storage Controller Scheduling for Word Line Program Time Balance

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Solution Overview

Problem

The increasing size of memory blocks in non-volatile memory devices leads to variations in program time between word lines, which deteriorates data reliability and performance.

Innovation Solution

A storage device with a storage controller that allocates memory blocks based on a word line table indicating optimal program times, schedules commands, and distributes erase operations across multiple non-volatile memory devices, operating in an interleaving manner to ensure consistent throughput and reduce peak power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the size of memory block is increased to increase capacity, then the capacity of non-volatile memory device is improved, but the difference in program time between word lines increases which deteriorates data reliability

Engineering Contradiction:
ImprovecapacityVSAvoiddata reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention divides the memory device into multiple non-volatile memory devices, each containing multiple memory blocks. By segmenting the total capacity across multiple devices, the patent achieves high capacity while limiting the number of word lines per device to maintain consistent program times and ensure data reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension by using multiple non-volatile memory devices in parallel instead of increasing the capacity within a single device. This dimensional shift allows the system to scale capacity without increasing the word line count in individual devices, thereby maintaining reliable program times.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the number of word lines within a memory block is increased to increase capacity, then the capacity is improved, but the program time difference between word lines increases

Engineering Contradiction:
ImprovecapacityVSAvoidprogram time difference
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The patent segments the memory capacity across multiple non-volatile memory devices, with each device containing a limited number of word lines. This segmentation ensures that program time differences within each device remain small while the total capacity is achieved through parallel devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The storage controller is designed to manage multiple non-volatile memory devices universally, distributing write requests across devices to maintain consistent program times. The controller's multi-device management capability allows the system to scale capacity without compromising program time uniformity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If erase operations are performed on all memory blocks, then data reliability is maintained, but peak power consumption increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidpeak power consumption
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The patent segments erase operations across multiple non-volatile memory devices rather than performing all erases on a single device. By distributing erase operations, the system maintains data reliability through periodic erases while reducing peak power consumption through parallel processing across multiple devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The storage controller continuously manages multiple non-volatile memory devices, performing erase operations on different devices at different times to maintain continuous data reliability without concentrating power consumption. This continuous distributed management smooths out power peaks.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentEP4664265A1Storage device and operating method thereof for reducing difference in program time between word lines
Publication Date: 2025.12.17 SAMSUNG ELECTRONICS CO LTD
  • EP4664265A1 patent drawingFigure 1
  • EP4664265A1 patent drawingFigure 2
  • EP4664265A1 patent drawingFigure 3

AI summary

A storage device includes a plurality of non-volatile memory devices and a storage controller configured to generate program commands and first addresses corresponding to a plurality of word lines included in a first super block based on a sequential write request from a host, determine whether to allocate at least one sub-memory block included in a second super block based on data of a word line table which indicate word lines having a relatively small program time and the first addresses, and generate at least one erase command and at least one second address corresponding to the allocated at least one sub-memory block for performing an erase operation.